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CY2277APVC-1 Datasheet

  • CY2277APVC-1

  • 6x86, K6 Clock Synthesizer/Driver for Desktop Mobile PCs wit...

  • 209.09KB

  • 19頁

  • CYPRESS

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7A
CY2277A
Pentium
廬
/II, 6x86, K6 Clock Synthesizer/Driver for Desktop/
Mobile PCs with Intel
廬
82430TX and 2 DIMMs or 3 SO-DIMMs
Features
鈥?Mixed 2.5V and 3.3V operation
鈥?Complete clock solution to meet requirements of Pen-
tium
廬
, Pentium
廬
II, 6x86, or K6 motherboards
鈥?Four CPU clocks at 2.5V or 3.3V
鈥?Up to eight 3.3V SDRAM clocks
鈥?Seven 3.3V synchronous PCI clocks, one free
running
鈥?Two 3.3V USB/IO clocks at 48 or 24 MHz, selectable
by serial interface
鈥?One 2.5V IOAPIC clock at 14.318 MHz
鈥?Two 3.3V Ref. clocks at 14.318 MHz
鈥?Factory-EPROM programmable CPU, PCI, and USB/IO
clock frequencies for custom configuration
鈥?Factory-EPROM programmable output drive and slew
rate for EMI customization
鈥?MODE Enable pin for CPU_STOP and PCI_STOP
鈥?SMBus serial configuration interface
鈥?Available in space-saving 48-pin SSOP and TSSOP
packages.
The CY2277A has power-down, CPU stop and PCI stop pins
for power management control. The CPU stop and PCI stop
are controlled by the MODE pin. They are multiplexed with
SDRAM clock outputs, and are selected when the MODE pin
is driven LOW. Additionally, these inputs are synchronized
on-chip, enabling glitch-free transitions. When the
CPU_STOP input is asserted, the CPU outputs are driven
LOW. When the PCI_STOP input is asserted, the PCI outputs
(except the free-running PCI clock) are driven LOW. Finally,
when the PWR_DWN pin is asserted, the reference oscillator
and PLLs are shut down, and all outputs are driven LOW.
The CY2277A outputs are designed for low EMI emission.
Controlled rise and fall times, unique output driver circuits and
factory-EPROM programmable output drive and slew-rate en-
able optimal configurations for EMI control.
CY2277A Selector Guide
Clock Outputs
CPU (60, 66.6 MHz)
CPU (33.3, 66.6 MHz)
CPU (SMBus select-
able)
PCI (CPU/2)
SDRAM
USB/IO (48 or 24 MHz)
IOAPIC (14.318 MHz)
Ref (14.318 MHz)
CPU-PCI delay
Note:
1. One free-running PCI clock.
-1/-1M
4
--
--
7
[1]
6/8
2
1
2
-3
--
4
--
7
[1]
6/8
2
1
2
-7M
4
--
--
7
[1]
6/8
2
1
2
<1 ns
-12/
-12M/
-12I
4
--
--
7
[1]
6/8
2
1
2
1鈥? ns
Functional Description
The CY2277A is a Clock Synthesizer/Driver for Pentium, Pen-
tium II, 6X86, and K6 portable PCs designed with the Intel
廬
82430TX or similar chipsets. There are three available options
as shown in the selector guide
The CY2277A outputs four CPU clocks at 2.5V or 3.3V with up
to nine selectable frequencies. There are up to eight 3.3V
SDRAM clocks and seven PCI clocks, running at one half the
CPU clock frequency. One of the PCI clocks is free-running.
Additionally, the part outputs two 3.3V USB/IO clocks at 48
MHz or 24 MHz, one 2.5V IOAPIC clock at 14.318 MHz, and
two 3.3V reference clocks at 14.318 MHz. The CPU, PCI,
USB, and IO clock frequencies are factory-EPROM program-
mable for easy customization with fast turnaround times.
1鈥? ns 1鈥? ns
Logic Block Diagram
IOAPIC (14.318 MHz)
V
DDQ2
REF [0鈥?]
(14.318)
Pin Configuration
SSOP
Top View
REF1
REF0
V
SS
XTALIN
CPUCLK[0鈥?]
XTALOUT
MODE
V
DDQ3
V
DDCPU
PCICLK_F
PCICLK0
SDRAM[0鈥?]
V
SS
PCICLK1
SDRAM6/CPU_STOP
PCICLK2
PCICLK3
PCICLK4
SDRAM7/PCI_STOP
V
DDQ3
PCICLK5
V
SS
SEL
PCI[0鈥?]
SDATA
SCLK
PCICLK_F
V
DDQ3
USBCLK/IOCLK[0:1]
USBCLK/IOCLK
USBCLK/IOCLK
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
AV
DD
PWR_SEL
V
DDQ2
IOAPIC
PWR_DWN
V
SS
CPUCLK0
CPUCLK1
V
DDCPU
CPUCLK2
CPUCLK3
V
SS
SDRAM0
SDRAM1
V
DDQ3
SDRAM2
SDRAM3
V
SS
SDRAM4
SDRAM5
V
DDQ3
SDRAM6/CPU_STOP
SDRAM7/PCI_STOP
AV
DD
XTALIN
XTALOUT
CPU
PLL
STOP
LOGIC
SEL
MODE
EPROM
SYS
PLL
/2
Delay
STOP
LOGIC
SERIAL
INTERFACE
CONTROL
LOGIC
Divide and
Mux Logic
PWR_DWN
SCLK
SDATA
Cypress Semiconductor Corporation
Document #: 38-07332 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised December 7, 2002
CY2277A-1,-1M,-3,-7M,-12,-12M,-12I
14.318
MHz
OSC.

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