1CY2295
CY22392
Three-PLL General Purpose
FLASH Programmable Clock Generator
Features
鈥?Three integrated phase-locked loops
鈥?Ultra Wide Divide Counters (8-bit Q, 11-bit P, and 7-bit
Post Divide)
鈥?Improved Linear Crystal Load capacitors
鈥?Flash programmability
鈥?Field programmable
鈥?Low-jitter, high-accuracy outputs
鈥?Power-management options (Shutdown, OE, Suspend)
鈥?Configurable Crystal drive strength
鈥?Frequency Select via 3 external LVTTL Inputs
鈥?3.3V operation
鈥?16-pin TSSOP packages
鈥?CyClocksRT鈩?Support
鈥?Non-Volatile programming enables easy customi-
zation, ultra-fast turnaround, performance tweaking,
design timing margin testing, inventory control, lower
part count, and more secure product supply. In
addition, any part in the family can also be programmed
multiple times which reduces programming errors and
provides an easy upgrade path for existing designs.
鈥?In-house programming of samples and prototype
quantities is available using the CY3672 FTG Devel-
opment Kit. Production quantities are available through
Cypress Semiconductor鈥檚 value added Distribution
partners or by using third party programmers from BP
Microsystems, HiLo Systems, and others.
鈥?Performance suitable for high-end multimedia, commu-
nications, industrial, A/D Converters, and consumer
applications.
鈥?Supports numerous low-power application schemes
and reduces EMI by allowing unused outputs to be
turned off.
鈥?Adjust Crystal Drive Strength for compatibility with
virtually all crystals.
鈥?3-Bit External Frequency Select Options for PLL1,
CLKA, and CLKB.
鈥?Industry-standard supply voltage.
鈥?Industry-standard packaging saves on board space.
鈥?Easy to use software support for design entry.
Benefits
鈥?Generates up to 3 unique frequencies on 6 outputs up
to 200 MHz from an external source. Functional
upgrade for current CY2292 family.
鈥?Allows for 0 ppm Frequency Generation and Frequency
Conversion under the most demanding applications.
鈥?Improves frequency accuracy over temperature, age,
process, and initial offset.
Logic Block Diagram
XTALIN
XTALOUT
OSC.
XBUF
CONFIGURATION
FLASH
PLL1
11 BIT P
8 BIT Q
PLL2
11 BIT P
8 BIT Q
PLL3
11 BIT P
8 BIT Q
4x4
Crosspoint
Switch
Divider
/2,3, or 4
CLKE
SHUTDOWN/OE
S0
S1
S2/SUSPEND
Divider
7 BIT
Divider
7 BIT
CLKD
CLKC
Divider
7 BIT
Divider
7 BIT
CLKB
CLKA
Cypress Semiconductor Corporation
Document #: 38-07013 Rev. *D
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised June 22, 2004
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