CY2213
High-Frequency Programmable PECL
Clock Generator
1CY2213
Features
鈥?Jitter peak-peak (TYPICAL) = 35 ps
鈥?LVPECL output
鈥?Default Select option
鈥?Serially-configurable multiply ratios
鈥?Output edge-rate control
鈥?16-pin TSSOP
鈥?High frequency
鈥?3.3V operation
High-accuracy clock generation
Benefits
One pair of differential output drivers
Phase-locked loop (PLL) multiplier select
Eight-bit feedback counter and six-bit reference counter for high accuracy
Minimize electromagnetic interference (EMI)
Industry-standard, low-cost package saves on board space
125- to 400-MHz (-1) or to 500-MHz (-2) extended output range for high-speed
applications
Enables application compatibility
Block Diagram
XIN
XOUT
OE
S
SER CLK
SER DATA
Xtal
Oscillator
PLL
xM
CLK
CLKB
Pin Configuration
CY2213
16-pin TSSOP
VDDX
VSSX
XOUT
XIN
VDD
OE
VSS
SER CLK
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
S
VDD
VSS
CLK
CLKB
VSS
VDD
SER DATA
Cypress Semiconductor Corporation
Document #: 38-07263 Rev. *E
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
,
CA 95134
鈥?/div>
408-943-2600
Revised May 23, 2003
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