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Lowers cost of oscillator as PLL can be programmed to a high
frequency using either a low-frequency, low-cost crystal, or an
existing system clock
EPROM-selectable TTL or CMOS duty-cycle levels
Duty cycle centered at 1.5V or V
DD
/2
Provides flexibility to service most TTL or CMOS applications
Sixteen selectable post-divide options, using either PLL
Provides flexibility in output configurations and testing
or reference oscillator/external clock
Programmable PWR_DWN or OE pin, with
Enables low-power operation or output enable function and
asynchronous or synchronous modes
flexibility for system applications, through selectable instanta-
neous or synchronous change in outputs
Low jitter outputs typically
Suitable for most PC, consumer, and networking applications
鈥?80 ps at 3.3V/5V
Controlled rise and fall times and output slew rate
Has lower EMI than oscillators
Available in both commercial and industrial
Suitable to fit most applications
temperature ranges
Factory-programmable device options
Easy customization and fast turnaround
Logic Block Diagram
Pin Configuration
PWR_DWN
or OE
Phase Detector
Crystal
Oscillator
Charge
Pump
Configuration
EPROM
V
DD
XTALOUT
XTALIN
PD/OE
8-pin
Top View
1
2
3
4
8
7
6
5
CLKOUT
V
SS
V
SS
V
SS
XTALOUT
[1]
XTALIN
or
external clock
Q
10 bits
VCO
P
12 bits
HIGH
ACCURACY
PLL
MUX
/ 1, 2, 4, 8, 16, 32, 64, 128
Note:
1. When using an external clock source, leave XTALOUT floating.
CLKOUT
Cypress Semiconductor Corporation
Document #: 38-07210 Rev. *B
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3901 North First Street
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San Jose
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CA 95134 鈥?408-943-2600
Revised December 07, 2002
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