鈥?/div>
Package line-up
Dual Vcc/Vss
CXK5B41020TM 400mil 32pin TSOP package
12ns (Max.)
10mA (Max.)
792mW (Max.)
Function
262144 word
脳
4-bit static RAM
Structure
Silicon gate Bi-CMOS IC
32 pin TSOP (PIastic)
Block Diagram
A16
A17
A10
A9
A14
A15
A12
A11
Buffer
Row
Decoder
Memory
Matrix
256
脳
4096
Pin Configuration
(Top View)
NC
Vcc
A3
A2
A1
A0
GND
CE
I/O1
Vcc
1
2
3
4
5
6
7
8
32
A4
31
A5
30
A6
29
A7
28
A8
27
OE
26
I/O4
25
GND
24
Vcc
23
I/O3
22
A9
21
A10
20
A11
19
A12
18
A13
17
NC
Pin Description
Symbol
A0 to A17
I/O1 to I/O4
CE
WE
OE
V
CC
GND
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3V power supply
Ground
No connection
GND
9
A6
A13
A5
A4
A3
A0
A2
A1
A7
A8
I/O Gate
Column
Decoder
I/O2
10
WE
11
A17
12
A16
13
A15
14
A14
15
NC
16
Buffer
WE
OE
CE
I/O Buffer
I/O1 I/O4
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any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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