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CAT25C16U14E-1.8 Datasheet

  • CAT25C16U14E-1.8

  • EEPROM

  • 11頁(yè)

  • ETC

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CAT25C01/02/04/08/16
1K/2K/4K/8K/16K SPI Serial CMOS EEPROM
FEATURES
s
10 MHz SPI compatible
s
1.8 to 6.0 volt operation
s
Hardware and software protection
s
Zero standby current
s
Low power CMOS technology
s
SPI modes (0,0 & 1,1)*
s
Commercial, industrial, automotive and
s
100 year data retention
s
Self-timed write cycle
H
GEN
FR
ALO
EE
LE
A
D
F
R
E
E
TM
s
1,000,000 program/erase cycles
s
8-pin DIP/SOIC, 8/14-pin TSSOP and 8-pin MSOP
s
16/32-byte page write buffer
s
Block write protection
鈥?Protect 1/4, 1/2 or all of EEPROM array
extended temperature ranges
DESCRIPTION
The CAT25C01/02/04/08/16 is a 1K/2K/4K/8K/16K Bit
SPI Serial CMOS EEPROM internally organized as
128x8/256x8/512x8/1024x8/2048x8 bits. Catalyst鈥檚
advanced CMOS Technology substantially reduces
device power requirements. The CAT25C01/02/04
features a 16-byte page write buffer. The 25C08/16
features a 32-byte page write buffer.The device operates
via the SPI bus serial interface and is enabled though a
Chip Select (CS). In addition to the Chip Select, the clock
input (SCK), data in (SI) and data out (SO) are required
to access the device. The
HOLD
pin may be used to
suspend any serial communication without resetting the
serial sequence. The CAT25C01/02/04/08/16 is designed
with software and hardware write protection features
including Block Write protection. The device is available
in 8-pin DIP, 8-pin SOIC, 8-pin MSOP and 8/14-pin
TSSOP packages.
PIN CONFIGURATION
TSSOP Package (U14, Y)
CS
SO
NC
NC
NC
WP
VSS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
VCC
HOLD
NC
NC
NC
SCK
SI
SOIC Package (S, V)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
DIP Package (P, L)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
TSSOP Package (U, Y)
CS
SO
WP
VSS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
MSOP Package (R, Z)*
CS
SO
WP
VSS
BLOCK DIAGRAM
SENSE AMPS
SHIFT REGISTERS
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
*CAT25C01/02 only
PIN FUNCTIONS
Pin Name
SO
SCK
WP
V
CC
V
SS
CS
SI
HOLD
NC
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
Function
Serial Data Output
Serial Clock
Write Protect
+1.8V to +6.0V Power Supply
Ground
Chip Select
Serial Data Input
Suspends Serial Input
No Connect
SO
SI
CS
WP
HOLD
SCK
I/O
CONTROL
SPI
CONTROL
LOGIC
BLOCK
PROTECT
LOGIC
CONTROL LOGIC
XDEC
E
2
PROM
ARRAY
DATA IN
STORAGE
HIGH VOLTAGE/
TIMING CONTROL
STATUS
REGISTER
25C128 F02
*Other SPI modes available on request.
漏 2002 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1016, Rev. H

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