CAT24FC64
64K-Bit I
2
C Serial CMOS EEPROM
FEATURES
I
Fast mode I
2
C bus compatible*
I
Max clock frequency:
I
Industrial and extended
H
GEN
FR
ALO
EE
LE
temperature ranges
I
5 ms max write cycle time
I
Write protect feature
A
D
F
R
E
E
TM
- 400KHz for VCC=1.8V to 5.5V
- 1MHz for VCC=2.5V to 5.5V
I
Schmitt trigger filtered inputs for noise suppression
I
Low power CMOS technology
I
64-byte page write buffer
I
Self-timed write cycle with auto-clear
鈥?entire array protected when WP at V
IH
I
1,000,000 program/erase cycles
I
100 year data retention
I
8-pin DIP, 8-pin SOIC (JEDEC), 8-pin SOIC
(EIAJ), 8-pin TSSOP and TDFN packages
DESCRIPTION
The CAT24FC64 is a 64K-bit Serial CMOS EEPROM
internally organized as 8,192 words of 8 bits each.
Catalyst鈥檚 advanced CMOS technology substantially
reduces device power requirements. The CAT24FC64
features a 64-byte page write buffer. The device oper-
ates via the I
2
C bus serial interface and is available in 8-
pin DIP or 8-pin SOIC packages.
PIN CONFIGURATION
DIP Package (P, L)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
BLOCK DIAGRAM
EXTERNAL LOAD
DOUT
ACK
VCC
VSS
WORD ADDRESS
BUFFERS
COLUMN
DECODERS
512
SENSE AMPS
SHIFT REGISTERS
A0
1
A1
2
A2
3
8
VCC
7
WP
6
SCL
5
SDA
TDFN Package (RD2, ZD2)
VSS
4
(Top View)
SOIC Package (J, W, K, X)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
VSS
TSSOP Package (U, Y)
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
SDA
START/STOP
LOGIC
XDEC
WP
CONTROL
LOGIC
128
EEPROM
128X512
PIN FUNCTIONS
Pin Name
A0, A1, A2
SDA
SCL
WP
V
CC
V
SS
NC
Function
Address Inputs
Serial Data/Address
Serial Clock
Write Protect
+1.8V to +5.5V Power Supply
Ground
No Connect
SCL
A0
A1
A2
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
HIGH VOLTAGE/
TIMING CONTROL
DATA IN STORAGE
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
漏 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1046, Rev. G