Semiconductor
January 1999
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ROD RODUC
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BSO BSTITU 612
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CL7
IBLE L7611, I
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IC
POS
CA3440
63kHz, Nanopower,
BiMOS Operational Ampli鏗乪rs
Features
鈥?High Input Resistance . . . . . . . . . . . . . . . . . . . 2T鈩?(Typ)
鈥?Standby Power at V+ = 5V . . . . . . . . . . . . . 300nW (Typ)
鈥?Supply Current, BW, Slew Rate Programmable Using
External Resistor
鈥?Input Current . . . . . . . . . . . . . . . . . . . . . . . . . 10pA (Typ)
鈥?5V to 15V Supply
鈥?Output Drives Typical Bipolar Type Loads
Description
The CA3440 is an integrated circuit operational ampli鏗乪r that
combines the advantages of MOS and bipolar transistors on
a single monolithic chip.
The CA3440 BiMOS op amp features gate protected PMOS
transistors in the input circuit to provide very high input
impedance, very low input currents (less than 10pA). This
device operates at total supply voltages from 5V to 15V and
can be operated over the temperature range from -55
o
C to
125
o
C. The virtues are programmability and very low
standby power consumption (300nW). This operational
ampli鏗乪r is internally phase compensated to achieve stable
operation in the unity gain follower con鏗乬uration. Terminals
are also provided for use in applications requiring input
offset voltage nulling. The use of PMOS in the input stage
results in common mode input voltage capability down to
0.5V below the negative supply terminals, an important
attribute for single supply applications. The output stage
uses MOS complementary source follower form which
permits moderate load driving capability (10k鈩? at very low
standby currents (50nA).
The CA3440 has the same 8 lead pinout as the 鈥?41鈥?and
other industry standard op amps with two exceptions:
terminals one and 鏗乿e must be connected to the negative
supply or to a potentiometer if nulling is required. Terminal 8
must be programmed through an external resistor returned
to the negative supply.
Part Number Information
PART NUMBER
(BRAND)
CA3440M
(3440)
TEMP.
RANGE (
o
C)
-55 to 125
PACKAGE
8 Ld SOIC
PKG.
NO.
M8.15
Pinout
CA3440
(SOIC)
TOP VIEW
V-/OFFSET NULL
INV. INPUT
NON-INV. INPUT
V-
1
2
3
4
8
I
SET
V+
OUTPUT
V-/OFFSET NULL
-
+
7
6
5
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
漏
Harris Corporation 1999
File Number
1318.5
3-146
INTERSIL
1
2
3
4
5
