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CA3252M Datasheet

  • CA3252M

  • Quad Gated Non-Inverting Power Driver

  • 56.96KB

  • 6頁(yè)

  • INTERSIL   INTERSIL

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CA3252
March 1998
Quad Gated Non-Inverting Power Driver
Description
The CA3252 is used to interface low-level logic to high cur-
rent loads. Each Power Driver has four inverting switches
consisting of an inverting logic input stage and an inverting
low-side driver output stage. All inputs are 5V TTL/CMOS
logic compatible and have a common Enable input. On-chip
steering diodes are connected from each output (in pairs) to
the CLAMP pins (in pairs) which may be used in conjunction
with external zener diodes to protect the IC against over-volt-
age transients that result from inductive load switching. The
CA3252 may be used in a variety of automotive and indus-
trial control applications to drive relays, solenoids, lamps and
small motors.
To allow for maximum heat transfer from the chip, all ground
pins on the DIP and SOIC packages are directly connected
to the mounting pad of the chip. Integral heat spreading lead
frames directly connect the bond pad and ground leads for
good heat dissipation. In a typical application, the package is
mounted on a copper PC Board. By increasing copper
ground area on the PC Board, more heat is conducted away
from the ground leads. The junction-to-ambient thermal
resistances may be reduced to less than 40
o
C/W with
approximately two square inches of copper area.
Features
鈥?Four 600mA Non-Inverting Power Output Drivers
鈥?50V and 1A Maximum Rated Power Output Drivers
鈥?V
CE(SUS)
Capability . . . . . . . . . . . . . . . . . . . . . . . . . 35V
鈥?Inputs Compatible With TTL or 5V CMOS Logic
鈥?Suitable For Resistive, Lamp or Inductive Loads
鈥?Inductive Clamps on Each Output
鈥?High Dissipation Power-Frame Package
鈥?Operating Temperature Ranges . . . . . . -40
o
C to 105
o
C
Applications
鈥?Solenoids
鈥?Relays
鈥?Lamps
鈥?Steppers
鈥?Small Motors
鈥?Displays
Ordering Information
System Applications
鈥?Automotive
鈥?Appliances
鈥?Industrial Controls
鈥?Robotics
PART
NUMBER
CA3252E
CA3252M
TEMP. (
o
C)
-40 to 105
-40 to 105
PACKAGE
16 Ld PDIP
20 Ld SOIC
PKG. NO.
E16.3
M20.3
Pinouts
CA3252E
(PDIP)
TOP VIEW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN A
IN B
ENABLE
GND
GND
V
CC
IN C
IN D
CLAMP AB
NC
NC
OUT B
GND
GND
OUT C
NC
NC
1
2
3
4
5
6
7
8
9
CA3252M
(SOIC)
TOP VIEW
20 OUT A
19 IN A
18 INB
17 ENABLE
16 GND
15 GND
14 V
CC
13 IN C
12 IN D
11 OUT D
OUT A
CLAMP AB
OUT B
GND
GND
OUT C
CLAMP CD
OUT D
CLAMP CD 10
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
File Number
1542.2
1

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