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C8051F365 Datasheet

  • C8051F365

  • Mixed Signal ISP Flash MCU Family

  • 288頁

  • SILABS

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C8051F360/1/2/3/4/5/6/7/8/9
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
10-Bit ADC (鈥楩360/1/2/6/7/8/9 only)
鈥?/div>
Up to 200 ksps
鈥?/div>
Up to 21 external single-ended or differential inputs
鈥?/div>
VREF from internal VREF, external pin or V
DD
鈥?/div>
Internal or external start of conversion source
鈥?/div>
Built-in temperature sensor
-
10-Bit Current Output DAC
-
(鈥楩360/1/2/6/7/8/9 only)
Two Comparators
Memory
-
1280 bytes internal data RAM (256 + 1024)
-
32 kB (鈥楩360/1/2/3/4/5/6/7) or 16 kB (鈥楩368/9) Flash;
In-system programmable in 1024-byte Sectors鈥?/div>
1024 bytes are reserved in the 32 kB devices
Digital Peripherals
-
up to 39 Port I/O; All 5 V tolerant with high sink cur-
-
-
-
-
rent
Hardware enhanced UART, SMBus鈩? and
enhanced SPI鈩?serial ports
Four general purpose 16-bit counter/timers
16-Bit programmable counter array (PCA) with six
capture/compare modules
Real time clock mode using PCA or timer and exter-
nal clock source
External Memory Interface (EMIF)
-
Brown-out detector and POR Circuitry
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-
-
-
intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Low cost,
complete
development kit
鈥?/div>
鈥?/div>
鈥?/div>
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current (0.4 碌A(chǔ))
-
Clock Sources
-
Two internal oscillators:
鈥?/div>
24.5 MHz with 鹵2% accuracy supports crystal-less
-
-
-
鈥?/div>
UART operation
80/40/20/10 kHz low frequency, low power
-
Supply Voltage
-
Range: 2.7鈥?.6 V (50 MIPS) 3.0鈥?.6 V (100 MIPS)
-
Power saving suspend and shutdown modes
High Speed 8051 碌C Core
-
Pipelined instruction architecture; executes 70% of
-
-
-
instructions in 1 or 2 system clocks
100 MIPS or 50 MIPS throughput with on-chip PLL
Expanded interrupt handler
2-cycle 16 x 16 MAC engine
Flexible PLL technology
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly; useful
in power saving modes
Packages
-
48-pin TQFP (C8051F360/3)
-
32-pin LQFP (C8051F361/4/6/8)
-
28-pin QFN (C8051F362/5/7/9)
Temperature Range: 鈥?0 to +85 擄C
CROSSBAR
External Memory Interface
ANALOG
PERIPHERALS
VOLTAGE
COMPARATORS
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
Port 1
Port 2
Port 3
Port 3
Port 4
+
-
+
-
A
M
U
X
10-bit
200 ksps
ADC
TEMP
SENSOR
10-bit
Current
DAC
鈥楩360/1/2/6/7/8/9 only
48-pin only
HIGH-SPEED CONTROLLER CORE
WDT
16 x 16
MAC
8051 CPU
(100 or 50 MIPS)
1024 B
SRAM
POR
FLEXIBLE
INTERRUPTS
DEBUG
CIRCUITRY
Internal Oscillator/
LFO/PLL
32/16 kB
ISP FLASH
Rev. 1.0 7/07
Copyright 漏 2007 by Silicon Laboratories
C8051F36x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

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