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C8051F333 Datasheet

  • C8051F333

  • Mixed Signal ISP Flash MCU Family

  • 1865.96KB

  • 214頁(yè)

  • ETC

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C8051F330/1/2/3/4/5
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
10-Bit ADC (鈥楩330/2/4 only)
鈥?/div>
Up to 200 ksps
鈥?/div>
Up to 16 external single-ended or differential inputs
鈥?/div>
VREF from internal VREF, external pin or V
DD
鈥?/div>
Internal or external start of conversion source
鈥?/div>
Built-in temperature sensor
-
10-Bit Current Output DAC (鈥楩330 only)
-
Comparator
鈥?/div>
Programmable hysteresis and response time
鈥?/div>
Configurable as interrupt or reset source
鈥?/div>
Low current (0.4 碌A(chǔ))
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-
-
-
intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Low cost,
complete
development kit
High Speed 8051 碌C Core
-
Pipelined instruction architecture; executes 70% of
-
-
Memory
-
768 bytes internal data RAM (256 + 512)
-
8 kB (鈥楩330/1), 4 kB (鈥楩332/3), or 2 kB (鈥楩334/5)
Flash; In-system programmable in 512-byte Sec-
tors鈥?12 bytes are reserved in the 8 kB devices
instructions in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
Digital Peripherals
-
17 Port I/O; All 5 V tolerant with high sink current
-
Hardware enhanced UART, SMBus鈩? and
-
-
-
enhanced SPI鈩?serial ports
Four general purpose 16-bit counter/timers
16-Bit programmable counter array (PCA) with three
capture/compare modules
Real time clock mode using PCA or timer and exter-
nal clock source
-
Supply Voltage 2.7 to 3.6 V
-
Typical operating current: 6.4 mA at 25 MHz;
-
Temperature Range: 鈥?0 to +85 擄C
9 碌A(chǔ) at 32 kHz
Typical stop mode current: 0.1 碌A(chǔ)
Clock Sources
-
Two internal oscillators:
鈥?/div>
24.5 MHz with 鹵2% accuracy supports crystal-less
-
-
鈥?/div>
UART operation
80/40/20/10 kHz low frequency, low power
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly; useful
in power saving modes
20-Pin QFN or 20-pin PDIP
CROSSBAR
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
Port 1
P2.0
10-bit
200 ksps
ADC
10-bit
Current
DAC
鈥楩330 only
TEMP
SENSOR
鈥楩330/2/4 only
+
-
VOLTAGE
COMPARATOR
24.5 MHz PRECISION
INTERNAL OSCILLATOR
LOW FREQUENCY INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
2/4/8 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
768 B SRAM
POR
WDT
Rev. 1.4 7/05
Copyright 漏 2005 by Silicon Laboratories
C8051F33x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

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