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C8051F122 Datasheet

  • C8051F122

  • Mixed Signal ISP Flash MCU Family

  • 2428.68KB

  • 356頁

  • ETC

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C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
10 or 12-bit SAR ADC
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鹵 1 LSB INL
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Programmable Throughput up to 100 ksps
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Up to 8 External Inputs; Programmable as Single-
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Ended or Differential
Programmable Amplifier Gain: 16, 8, 4, 2, 1, 0.5
Data-Dependent Windowed Interrupt Generator
Built-in Temperature Sensor
Programmable Throughput up to 500 ksps
8 External Inputs (Single-Ended or Differential)
Programmable Amplifier Gain: 4, 2, 1, 0.5
Can Synchronize Outputs to Timers for Jitter-Free
Waveform Generation
High Speed 8051
碌C
Core
-
Pipelined Instruction Architecture; Executes 70% of
-
-
Instruction Set in 1 or 2 System Clocks
100 MIPS or 50 MIPS Throughput with On-chip PLL
2-cycle 16 x 16 MAC Engine (C8051F120/1/2/3 and
C8051F130/1/2/3 Only)
-
8-bit SAR ADC (鈥楩12x Only)
Memory
-
8448 Bytes Internal Data RAM (8k + 256)
-
128k or 64k Bytes Banked FLASH; In-System pro-
-
grammable in 1024-byte Sectors
External 64k Byte Data Memory Interface (program-
mable multiplexed or non-multiplexed modes)
-
Two 12-bit DACs (鈥楩12x Only)
-
Two Analog Comparators
-
Voltage Reference
-
VDD Monitor/Brown-Out Detector
On-Chip JTAG Debug & Boundary Scan
-
On-chip debug circuitry facilitates full-speed, non-
-
-
intrusive in-circuit/in-system debugging
Provides breakpoints, single-stepping, watchpoints,
stack monitor; inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
IEEE1149.1 compliant boundary scan
Complete development kit
Digital Peripherals
-
8 Byte-Wide Port I/O (100TQFP); 5V tolerant
-
4 Byte-Wide Port I/O (64TQFP); 5V tolerant
-
Hardware SMBus鈩?(I
2
C鈩?Compatible), SPI鈩? and
-
Two UART Serial Ports Available Concurrently
Programmable 16-bit Counter/Timer Array with
6 Capture/Compare Modules
5 General Purpose 16-bit Counter/Timers
Dedicated Watchdog Timer; Bi-directional Reset Pin
-
-
100-Pin TQFP or 64-Pin TQFP Packaging
-
Temperature Range: -40擄C to +85擄C
-
-
Clock Sources
-
Internal Precision Oscillator: 24.5 MHz
-
Flexible PLL technology
-
External Oscillator: Crystal, RC, C, or Clock
Voltage Supples
-
Range: 2.7-3.6V (50 MIPS) 3.0-3.6V (100 MIPS)
-
Power Saving Sleep and Shutdown Modes
ANALOG PERIPHERALS
VREF
DIGITAL I/O
UART0
UART1
SMBus
SPI Bus
PCA
Timer 0
Timer 1
Timer 2
CROSSBAR
External Memory Interface
PGA
10/12-bit
100ksps
ADC
TEMP
SENSOR
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
64 pin
100 pin
AMUX
+
-
+
-
VOLTAGE
COMPARATORS
PGA
8-bit
500ksps
ADC
AMUX
12-Bit
DAC
12-Bit
DAC
Timer 3
Timer 4
C8051F12x Only
HIGH-SPEED CONTROLLER CORE
8051 CPU
128/64 kB 8448 B
16 x 16 MAC
(50 or 100MIPS)
ISP FLASH SRAM ('F120/1/2/3, 'F13x)
20
DEBUG
CLOCK / PLL
JTAG
INTERRUPTS
CIRCUITRY
CIRCUIT
Rev. 1.3 8/04
Copyright 漏 2004 by Silicon Laboratories
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3

C8051F122 產(chǎn)品屬性

  • 90

  • 集成電路 (IC)

  • 嵌入式 - 微控制器，

  • C8051F12x

  • 8051

  • 8-位

  • 100MHz

  • EBI/EMI，SMBus（2 線/I²C），SPI，UART/USART

  • 欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT

  • 64

  • 128KB（128K x 8）

  • 閃存

  • -

  • 8.25K x 8

  • 3 V ~ 3.6 V

  • A/D 8x8b，8x10b; D/A 2x12b

  • 內(nèi)部

  • -40°C ~ 85°C

  • 100-TQFP

  • 托盤

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