CERAMIC CHIP CAPACITORS
FEATURES
鈥?C0G (NP0), X7R, X5R, Z5U and Y5V Dielectrics
鈥?10, 16, 25, 50, 100 and 200 Volts
鈥?Standard End Metalization: Tin-plate over nickel
barrier
鈥?Available Capacitance Tolerances: 鹵0.10 pF; 鹵0.25
pF; 鹵0.5 pF; 鹵1%; 鹵2%; 鹵5%; 鹵10%; 鹵20%; and
+80%-20%
KEMET
廬
鈥?Tape and reel packaging per EIA481-1. (See page
61 for specific tape and reel information.) Bulk
Cassette packaging (0402, 0603, 0805 only) per
IEC60286-6 and EIAJ 7201.
CAPACITOR OUTLINE DRAWINGS
W
T
S
ELECTRODES
L
B
TIN PLATE
NICKEL PLATE
CONDUCTIVE
METALLIZATION
DIMENSIONS鈥擬ILLIMETERS AND (INCHES)
EIA
SIZE CODE
0402*
0603*
0805*
1206*
1210*
1812
1825*
2220
2225
METRIC
SIZE CODE
(Ref only)
1005
1608
2012
3216
3225
4532
4564
5650
5664
L#
LENGTH
1.0 (.04) 鹵 .05(.002)
1.6 (.063) 鹵 0.15 (.006)
2.0 (.079) 鹵 0.2 (.008)
3.2 (.126) 鹵 0.2 (.008)
3.2 (.126) 鹵 0.2 (.008)
4.5 (.177) 鹵 0.3 (.012)
4.5 (.177) 鹵 0.3 (.012)
5.6 (.220) 鹵 0.4 (.016)
5.6 (.220) 鹵 0.4 (.016)
W#
WIDTH
0.5 (.02) 鹵 .05 (.002)
0.8 (.032) 鹵 0.15 (.006)
1.25 (.049) 鹵 0.2 (.008)
1.6 (.063) 鹵 0.2 (.008)
2.5 (.098) 鹵 0.2 (.008)
3.2 (.126) 鹵 0.3 (.012)
6.4 (.252) 鹵 0.4 (.016)
5.0 (.197) 鹵 0.4 (.016)
6.3 (.248) 鹵 0.4 (.016)
B
BANDWIDTH
0.20 (0.008)-0.40 (0.016)
S
MIN. SEPARATION
0.3 (.012)
0.7 (.028)
0.75 (.030)
N/A
N/A
N/A
N/A
N/A
N/A
MOUNTING
TECHNIQUE
Solder Reflow
See pages
48-52 for
thickness
dimensions.
0.35 (.014) 鹵0.15 (.006)
0.5 (.02) 鹵.25 (.010)
0.5 (.02) 鹵.25 (.010)
0.5 (.02) 鹵.25 (.010)
0.6 (.024) 鹵.35 (.014)
0.6 (.024) 鹵.35 (.014)
0.6 (.024) 鹵.35 (.014)
0.6 (.024) 鹵.35 (.014)
Solder Wave
鈥?/div>
or
Solder Reflow
Solder
Reflow
CAPACITOR ORDERING INFORMATION
(Standard Chips - For
C 0805 C 103 K 5 R A C*
CERAMIC
SIZE CODE
SPECIFICATION
C - Standard
CAPACITANCE CODE
Expressed in Picofarads (pF)
First two digits represent significant figures.
Third digit specifies number of zeros. (Use 9
for 1.0 through 9.9pF. Use 8 for 0.5 through 0.99pF)
(Example: 2.2pF = 229 or 0.50 pF = 508)
CAPACITANCE TOLERANCE
B 鈥?鹵0.10pF J 鈥?鹵5%
C 鈥?鹵0.25pF K 鈥?鹵10%
D 鈥?鹵0.5pF
M 鈥?鹵20%
F 鈥?鹵1%
P 鈥?(GMV) 鈥?special order only
G 鈥?鹵2%
Z 鈥?+80%, -20%
END METALLIZATION
C-Standard
(Tin-plated nickel barrier)
FAILURE RATE LEVEL
A- Not Applicable
Military see page 55)
TEMPERATURE CHARACTERISTIC
Designated by Capacitance
Change Over Temperature Range
G 鈥?C0G (NP0) (鹵30 PPM/擄C)
R 鈥?X7R (鹵15%) (-55擄C + 125擄C)
P鈥?X5R (鹵15%) (-55擄C + 85擄C)
U 鈥?Z5U (+22%, -56%) (+10擄C + 85擄C)
V 鈥?Y5V (+22%, -82%) (-30擄C + 85擄C)
VOLTAGE
1 - 100V
3 - 25V
2 - 200V
4 - 16V
5 - 50V
8 - 10V
* Part Number Example: C0805C103K5RAC (14 digits - no spaces)
9 - 6.3V
49
KEMET Electronics Corporation, P.O. Box 5928, Greenville, S.C. 29606, (864) 963-6300
Ceramic Surface Mount
* Note: Indicates EIA Preferred Case Sizes (Tightened tolerances apply for 0402, 0603, and 0805 packaged in bulk cassette, see page 65.)
#Note: These thicknesses are EIA maximums. Most chips are considerably thinner. Consult factory for details. Also, some extended values may be slightly thicker than EIA maximums.
鈥?For extended value 1210 case size 鈥?solder reflow only.
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