Standard ICs
Dual 4-bit static shift register
BU4015B / BU4015BF
The BU4015B and BU4015BF are 4-stage static shift registers, each consisting of two circuits.
The D flip-flops for each stage share a common reset input, enabling external asynchronous reset at any point.
Also, the flip-flops at each stage are triggered by the rising edge of the clock input.
鈥淗鈥?level reset input resets the contents of all stages to 鈥淟鈥? regardless of the clock and data input, and sets data out-
puts Q0 to Q3 to 鈥淟鈥?
鈥?/div>
Features dissipation.
1) Low power
2) Wide range of operating power supply voltages.
3) High input impedance.
4) High fan-out.
5) Direct drive of 2 L-TTL inputs and 1 LS-TTL input.
鈥?/div>
Block diagram
CLOCK
B
Q
3B
1
16
V
DD
2
CL
Q
2B
3
R
D
14
RESET
B
Q
0B
15
D
B
鈥?/div>
Logic circuit diagram
Q
0
Q
1
Q
2
Q
3
D
D
Q
D
Q
D
Q
D
Q
CLR Q
CLR Q
CLR Q
CLR Q
CLOCK
Q
3
Q
2
Q
1
Q
0
Q
1A
4
13
RESET
Q
0A
RESET
A
D
A
5
Q
0
Q
1
Q
2
Q
3
6
CL
R
D
12
Q
1B
Q
2B
11
7
10
Q
3A
CLOCK
A
V
SS
8
9
鈥?/div>
Truth table
CLOCK
D
L
H
X
X
X : Irrelevant
RESET
L
L
L
H
Q
0
L
H
Q
1
Q
0
Q
0
Q
2
Q
1
Q
1
Q
3
Q
2
Q
2
No Change
L
L
L
L
X
1
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