BSI
FEATURES
Ultra Low Power/Voltage CMOS SRAM
256K X 8 bit
DESCRIPTION
BS62UV2001
鈥?Wide Vcc operation voltage : 1.8V ~ 3.6V
鈥?Ultra low power consumption :
Vcc = 2.0V C-grade : 15mA (Max.) operating current
I- grade : 20mA (Max.) operating current
0.08uA (Typ.) CMOS standby current
Vcc = 3.0V C-grade : 20mA (Max.) operating current
I- grade : 25mA (Max.) operating current
0.1uA (Typ.) CMOS standby current
鈥?High speed access time :
-70
70ns(Max.) at Vcc = 2.0V
-10
100ns(Max.) at Vcc = 2.0V
鈥?Automatic power down when chip is deselected
鈥?Three state outputs and TTL compatible
鈥?Fully static operation
鈥?Data retention supply voltage as low as 1.5V
鈥?Easy expansion with CE2, CE1, and OE options
The BS62UV2001 is a high performance, Ultra low power CMOS
Static Random Access Memory organized as 262,144 words by 8 bits
and operates from a wide range of 1.8V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.1uA and maximum access time of 70ns in 3.0V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62UV2001 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62UV2001 is available in the JEDEC standard 32 pin
450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.
PRODUCT FAMILY
PRODUCT
FAMILY
BS62UV2001TC
BS62UV2001STC
BS62UV2001SC
BS62UV2001TI
BS62UV2001STI
BS62UV2001SI
OPERATING
TEMPERATURE
Vcc
RANGE
SPEED
(ns)
Vcc=2V
+0 C to +70 C
O
O
POWER DISSIPATION
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
TSOP
-
32
STSOP
-
32
SOP
-
32
TSOP
-
32
STSOP
-
32
SOP
-
32
Vcc=3V
0.7uA
Vcc=2V Vcc=3V Vcc=2V
0.5uA
20mA
15mA
1.8~3.6V
70 / 100
-40 C to +85 C
O
O
1.8~3.6V
70 / 100
1.5uA
1uA
25mA
20mA
PIN CONFIGURATIONS
A11
A9
A8
A13
WE
CE2
A15
VCC
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
BLOCK DIAGRAM
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
A13
A17
A15
A16
A14
A12
A7
A6
A5
A4
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
Brilliance Semiconductor Inc
.
reserves the right to modify document contents without notice.
R0201-BS62UV2001
鈥?/div>
BS62UV2001TC
BS62UV2001STC
BS62UV2001TI
BS62UV2001STI
Address
Input
Buffer
20
Row
Decoder
1024
Memory Array
1024 x 2048
2048
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
Input
Buffer
8
Column I/O
Write Driver
Sense Amp
256
Column Decoder
16
Control
Address Input Buffer
鈥?/div>
1
2
3
4
5
6
7
BS62UV2001SC
8
BS62UV2001SI
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
8
Data
Output
Buffer
8
CE1
CE2
WE
OE
Vdd
Gnd
A11 A9 A8 A3 A2 A1 A0 A10
1
Revision 2.4
April 2002
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