BSI
n
FEATURES
Ultra Low Power/High Speed CMOS SRAM
256K X 16 bit
鷗
鷗
鷗
鷗
BS616UV4016
鷗
Wide V
CC
operation voltage :
C-grade : 1.8V ~ 3.6V
I-grade : 1.9V ~ 3.6V
(V
CC
_min.=1.65V at 25
O
C)
鷗
Ultra low power consumption :
V
CC
= 2.0V
C-grade : 10mA(Max.) operating current
I-grade : 12mA(Max.) operating current
0.3uA (Typ.) CMOS standby current
V
CC
= 3.0V
C-grade : 13mA(Max.) operating current
I-grade : 15mA(Max.) operating current
0.45uA (Typ.) CMOS standby current
鷗
High speed access time :
-85
85ns (Max.)
-10
100ns (Max.)
鷗
Automatic power down when chip is deselected
鷗
Easy expansion with CE and OE options
I/O Configuration x8/x16 selectable by LB and UB pin.
Three state outputs and TTL compatible
Fully static operation
Data retention supply voltage as low as 1.2V
n
DESCRIPTION
The BS616UV4016 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 262,144 words by 16 bits and
operates form a wide range of 1.8V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with typical CMOS standby current of
0.3uA at 2.0V/25
O
C and maximum access time of 85ns at 85
O
C.
Easy memory expansion is provided by an active LOW chip enable (CE)
and active LOW output enable (OE) and three-state output drivers.
The BS616UV4016 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV4016 is available in DICE form, JEDEC standard 44-pin
TSOP Type II and 48-ball BGA package.
n
PRODUCT FAMILY
PRODUCT
FAMILY
BS616UV4016DC
BS616UV4016EC
BS616UV4016AC
BS616UV4016DI
BS616UV4016EI
BS616UV4016AI
-40
O
C to +85
O
C
1.9V ~ 3.6V
85/100
8.0uA
5.0uA
15mA
12mA
+0
O
C to +70
O
C
1.8V ~ 3.6V
85/100
6.0uA
3.0uA
13mA
10mA
OPERATING
TEMPERATURE
V
CC
RANGE
SPEED
(ns)
C-grade : 1.8~3.6V
I-grade : 1.9~3.6V
POWER DISSIPATION
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
V
CC
=3.0V V
CC
=2.0V V
CC
=3.0V V
CC
=2.0V
DICE
TSOP2-44
BGA-48-0608
DICE
TSOP2-44
BGA-48-0608
n
PIN CONFIGURATIONS
A4
A3
A2
A1
A0
CE
IO0
IO1
IO2
IO3
VCC
GND
IO4
IO5
IO6
IO7
WE
A17
A16
A15
A14
A13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
IO15
IO14
IO13
IO12
GND
VCC
IO11
IO10
IO9
IO8
NC
A8
A9
A10
A11
A12
n
BLOCK DIAGRAM
BS616UV4016EC
BS616UV4016EI
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
Address
Input
Buffer
10
Row
Decoder
1024
Memory Array
1024 x 4096
2048
IO0
.
.
.
.
.
.
IO15
.
.
.
.
.
.
16
Data
Input
Buffer
Data
Output
Buffer
16
256
Column Decoder
8
Control
Address Input Buffer
16
Column I/O
Write Driver
Sense Amp
1
A
B
C
D
E
F
G
H
UB
IO8
IO9
VSS
VCC
IO14
IO15
NC
2
OE
LB
IO10
IO11
IO12
IO13
NC
A8
3
A0
A3
A5
A17
NC
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
CE
IO1
IO3
IO4
IO5
WE
A11
6
NC
IO0
IO2
VCC
VSS
IO6
IO7
NC
16
CE
WE
OE
UB
LB
V
CC
GND
A13 A14 A15 A16 A17 A0 A1 A2
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to modify document contents without notice.
R0201-BS616UV4016
1
Revision 1.3
Sep.
2005
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