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BSI

FEATURES

Very Low Power/Voltage CMOS SRAM

256K X 16 bit

DESCRIPTION

BS616LV4015

鈥?Operation voltage : 4.5 ~ 5.5V

鈥?Low power consumption :

Vcc = 5.0V

C-grade: 45mA (Max.) operating current

I-grade: 50mA (Max.) operating current

1.5uA (Typ.) CMOS standby current

鈥?High speed access time :

-70

70ns (Max.) at Vcc = 5.0V

-55

55ns (Max.) at Vcc = 5.0V

鈥?Automatic power down when chip is deselected

鈥?Three state outputs and TTL compatible

鈥?Fully static operation

鈥?Data retention supply voltage as low as 2V

鈥?Easy expansion with CE and OE options

鈥?I/O Configuration x8/x16 selectable by LB and UB pin

The BS616LV4015 is a high performance, very low power CMOS Static

Random Access Memory organized as 262,144 words by 16 bits and

operates from a wide range of 4.5V to 5.5V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with a typical CMOS standby current

of 1.5uA and maximum access time of 55ns in 5V operation.

Easy memory expansion is provided by an active LOW chip

enable(CE) and active LOW output enable(OE) and three-state output

drivers.

The BS616LV4015 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BS616LV4015 is available in DICE form, JEDEC standard 44-pin

TSOP Type II package and 48-pin BGA package.

PRODUCT FAMILY

PRODUCT

FAMILY

BS616LV4015DC

BS616LV4015EC

BS616LV4015BC

BS616LV4015AC

BS616LV4015DI

BS616LV4015EI

BS616LV4015BI

BS616LV4015AI

OPERATING

TEMPERATURE

Vcc

RANGE

SPEED

( ns )

Vcc=

5.0V

( I

CCSB1

, Max )

POWER DISSIPATION

STANDBY

Operating

( I

CC

, Max )

Vcc=

5.0V

15uA

Vcc=

5.0V

45mA

PKG TYPE

DICE

TSOP2-44

BGA-48-0810

BGA-48-0608

DICE

TSOP2-44

BGA-48-0810

BGA-48-0608

+0

O

C to +70

O

C

4.5V ~ 5.5V

70/55

-40

O

C to +85

O

C

4.5V ~ 5.5V

70/55

50uA

50mA

PIN CONFIGURATIONS

A4

A3

A2

A1

A0

CE

DQ0

DQ1

DQ2

DQ3

VCC

GND

DQ4

DQ5

DQ6

DQ7

WE

A17

A16

A15

A14

A13

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

A5

A6

A7

OE

UB

LB

DQ15

DQ14

DQ13

DQ12

GND

VCC

DQ11

DQ10

DQ9

DQ8

NC

A8

A9

A10

A11

A12

BLOCK DIAGRAM

A4

A3

A2

A1

A0

A17

A16

A15

A14

A13

A12

Address

Input

Buffer

22

Row

Decoder

2048

Memory Array

2048 x 2048

BS616LV4015EC

BS616LV4015EI

2048

DQ0

16

Data

Input

Buffer

16

Column I/O

.

.

.

.

DQ15

.

.

.

.

Write Driver

Sense Amp

128

Column Decoder

16

Data

Output

16

Buffer

CE

WE

OE

UB

LB

Vcc

Gnd

Control

14

Address Input Buffer

A11 A10 A9 A8 A7 A6 A5

Brilliance Semiconductor Inc

.

reserves the right to modify document contents without notice.

R0201-BS616LV4015

1

Revision 2.4

April 2002

next

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