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BS616LV2018TC Datasheet

  • BS616LV2018TC

  • Very Low Power/Voltage CMOS SRAM 128K X 16 bit

  • 11頁(yè)

  • BSI

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BSI
FEATURES
Very Low Power/Voltage CMOS SRAM
128K X 16 bit
DESCRIPTION
BS616LV2018
鈥?Very low operation voltage : 2.4 ~ 3.6V
鈥?Very low power consumption :
Vcc = 3.0V
C-grade: 16mA (Max.) operating current
I -grade: 20mA (Max.) operating current
0.1uA (Typ.) CMOS standby current
鈥?High speed access time :
-70
70ns (Max.) at Vcc = 3.0V
鈥?Automatic power down when chip is deselected
鈥?Three state outputs and TTL compatible
鈥?Fully static operation
鈥?Data retention supply voltage as low as 1.5V
鈥?Easy expansion with CE and OE options
鈥?I/O Configuration x8/x16 selectable by LB and UB pin
The BS616LV2018 is a high performance, very low power CMOS Static
Random Access Memory organized as 131,072 words by 16 bits and
operates from a wide range of 2.4V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.1uA and maximum access time of 70ns in 3V operation.
Easy memory expansion is provided by active LOW chip
enable(CE), active LOW output enable(OE) and three-state output
drivers.
The BS616LV2018 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV2018 is available in DICE form, JEDEC standard 48-pin
TSOP Type I package and 48-ball BGA package.
PRODUCT FAMILY
PRODUCT
FAMILY
BS616LV2018DC
BS616LV2018TC
BS616LV2018AC
BS616LV2018DI
BS616LV2018TI
BS616LV2018AI
-40
O
C to +85
O
C
2.4V ~3.6V
70
1.5
uA
20
mA
0
O
C to +70
O
C
70
0.7 uA
16
mA
OPERATING
TEMPERATURE
Vcc
RANGE
SPEED
(ns)
Vcc=
3.0V
POWER DISSIPATION
STANDBY
Operating
(I
CCSB1
, Max)
Vcc=3.0V
(I
CC
, Max)
Vcc=3.0V
PKG TYPE
DICE
TSOP1-48
BGA-48-0608
DICE
TSOP1-48
BGA-48-0608
PIN CONFIGURATIONS
1
2
3
4
5
6
BLOCK DIAGRAM
A8
A13
A15
A16
A14
A12
A7
A6
A5
A4
2048
Data
Input
Buffer
16
Address
Input
Buffer
20
Row
Decoder
1024
Memory Array
1024 x 2048
A
B
C
D
E
F
G
H
LB
D8
D9
VSS
VCC
OE
UB
D10
D11
D12
D13
A0
A3
A5
N.C.
N.C.
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
N.C.
D0
D2
VCC
VSS
CE
D1
D3
D4
D5
WE
A11
DQ0
16
Column I/O
D14
D15
N.C.
D6
D7
N.C.
.
.
.
.
DQ15
.
.
.
.
Write Driver
Sense Amp
128
Column Decoder
16
Data
Output
16
Buffer
N.C.
A8
CE
WE
OE
UB
Control
14
Address Input Buffer
48-ball BGA top view
LB
Vcc
Gnd
A11 A9 A3 A2 A1 A0 A10
Brilliance Semiconductor Inc
.
reserves the right to modify document contents without notice.
R0201-BS616LV2018
1
Revision 2.0
April 2002

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