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BQ4845YP-A4 Datasheet

  • BQ4845YP-A4

  • Parallel RTC With CPU Supervisor

  • 1114.81KB

  • 22頁

  • TI

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bq4845/bq4845Y
Parallel RTC With CPU Supervisor
Features
廬
Real-Time Clock counts seconds
through years in BCD format
廬
On-chip battery-backup switchover
circuit with nonvolatile control for
external SRAM
廬
Less than 500nA of clock opera-
tion current in backup mode
廬
Microprocessor reset valid to
V
CC
= V
SS
廬
Independent watchdog timer
with a programmable time-out
period
廬
Power-fail interrupt warning
廬
Programmable clock alarm inter-
rupt active in battery-backup
mode
廬
Programmable periodic interrupt
廬
Battery-low warning
General Description
The bq4845 Real-Time Clock is a
low-power microprocessor periph-
eral that integrates a time-of-day
clock, a 100-year calendar, and a
CPU supervisor in a 28-pin SOIC or
DIP. The bq4845 is ideal for fax ma-
chines, copiers, industrial control
systems, point-of-sale terminals,
data loggers, and computers.
The bq4845 provides direct connec-
tions for a 32.768KHz quartz crystal
and a 3V backup battery. Through
the use of the conditional chip en-
able output (CE
OUT
) and battery
voltage output (V
OUT
) pins, the
bq4845 can write-protect and make
nonvolatile external SRAMs. The
backup cell powers the real-time
clock and maintains SRAM infor-
mation in the absence of system
voltage.
The bq4845 contains a temperature-
compensated reference and comparator
circuit that monitors the status of its
voltage supply. When the bq4845 de-
tects an out-of-tolerance condition, it
generates an interrupt warning and
subsequently a microprocessor reset.
The reset stays active for 200ms after
V
CC
rises within tolerance, to allow for
power supply and processor stabiliza-
tion.
The bq4845 also has a built-in
watchdog timer to monitor processor
operation. If the microprocessor does
not toggle the watchdog input (WDI)
within the programmed time-out pe-
riod, the bq4845 asserts WDO and
RST. WDI unconnected disables the
watchdog timer.
The bq4845 can generate other in-
terrupts based on a clock alarm con-
dition or a periodic setting. The
alarm interrupt can be set to occur
from once per second to once per
month. The alarm can be made active
in the battery-backup mode to serve
as a system wake-up call. For inter-
rupts at a rate beyond once per sec-
ond, the periodic interrupt can be pro-
grammed with periods of 30.5碌s to
500ms.
Pin Connections
V
OUT
X
1
X
2
WDO
INT
RST
A
3
A
2
A
1
A
0
DQ
0
DQ
1
DQ
2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
CE
IN
CE
OUT
BC
WDI
OE
CS
V
SS
DQ
7
DQ
8
DQ
5
DQ
4
DQ
3
Pin Names
A
0
鈥揂
3
DQ
0
鈥揇Q
7
WE
OE
CS
CE
IN
CE
OUT
X1鈥揦2
Clock/control address
inputs
Data inputs/outputs
Write enable
Output enable
Chip select input
External RAM chip
enable
Conditional RAM chip
enable
Crystal inputs
BC
V
OUT
INT
RST
WDI
WDO
V
CC
V
SS
Backup battery input
Back-up battery output
Interrupt output
Microprocessor reset
Watchdog input
Watchdog output
+5V supply
Ground
28-DIP or SOIC
PN484501.eps
Aug. 1995
1

BQ4845YP-A4 產(chǎn)品屬性

  • Clock Basics in 10 minutes or less

  • 104

  • 集成電路 (IC)

  • 時鐘/計時 - 實時時鐘

  • -

  • 時鐘/日歷

  • 警報器，夏令時，閏年，監(jiān)控器，監(jiān)視計時器

  • -

  • HH:MM:SS（12/24 小時）

  • YY-MM-DD-dd

  • 并聯(lián)

  • 4.5 V ~ 5.5 V

  • 2.3 V ~ 4 V

  • 0°C ~ 70°C

  • 通孔

  • 28-DIP（0.600"，15.24mm）

  • 28-PDIP

  • 管件

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