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BQ4285S- Datasheet

  • BQ4285S-

  • Real-Time Clock RTC With NVRAM Control

  • 24頁

  • TI

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bq4285
Real-Time Clock (RTC) With NVRAM Control
Features
廬
Direct clock/calendar replace-
ment for IBM
廬
AT-compatible
computers and other applications
廬
Functionally compatible with the
DS1285
廬
Calendar in day of the week, day of
the month, months, and years, with
automatic leap-year adjustment
廬
Time of day in seconds, minutes,
and hours
General Description
The CMOS bq4285 is a low-power
microprocessor peripheral providing
a time-of-day clock and 100-year cal-
endar with alarm features and bat-
tery operation. Other features include
three maskable interrupt sources,
square wave output, and 114 bytes of
general nonvolatile storage.
The bq4285 write-protects the clock,
calendar, and storage registers dur-
ing power failure. A backup battery
then maintains data and operates
the clock and calendar.
The bq4285 is a fully compatible real-
time clock for IBM AT-compatible com-
puters and other applications. The only
external components are a 32.768kHz
crystal and a backup battery.
The bq4285 integrates a battery-
backup controller to make a standard
CMOS SRAM nonvolatile during
power-fail conditions. During power-
fail, the bq4285 automatically write-
protects the external SRAM and pro-
vides a V
CC
output sourced from the
clock backup battery.
-
Closely matches MC146818A
pin configuration
-
-
12- or 24-hour format
Optional daylight saving
adjustment
廬
114 bytes of general nonvolatile
storage
廬
Automatic backup and write-
protect control to external SRAM
廬
160 ns cycle time allows fast bus
operation
廬
Selectable Intel or Motorola bus
timing (PLCC), Intel bus timing
(DIP and SOIC)
廬
Less than 0.5
碌A(chǔ)
load under bat-
tery operation
廬
14 bytes for clock/calendar and
control
廬
BCD or binary format for clock
and calendar data
廬
Programmable square wave out-
put
廬
Three individually maskable in-
terrupt event flags:
-
-
-
Periodic rates from 122
碌s
to
500 ms
Time-of-day alarm once per
second to once per day
End-of-clock update cycle
廬
24-pin plastic DIP or SOIC
Pin Connections
Pin Names
AD
0
鈥揂D
7
MOT
X2
X1
MOT
VOUT
VCC
SQW
CEOUT
Multiplexed address/data
input/output
Bus type select input
(PLCC only )
Chip select input
Address strobe input
Data strobe input
Read/write input
Interrupt request output
Reset input
Square wave output
3V backup cell input
Crystal inputs
No connect
RAM chip enable input
RAM chip enable output
Supply output
+5V supply
Ground
AD6
NC
AD7
VSS
VOUT
X1
X2
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
VSS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
SQW
CEOUT
CEIN
BC
INT
RST
DS
VSS
R/W
AS
CS
24-Pin DIP or SOIC
PN428501.eps
28-Pin PLCC
PN428502.eps
Jan. 1999 D
1
CS
AS
NC
12
13
14
15
16
17
18
AD0
AD1
AD2
AD3
AD4
AD5
NC
5
6
7
8
9
10
11
25
24
23
22
21
20
19
CEIN
BC
INT
RST
DS
VSS
R/ W
CS
AS
DS
R/W
INT
RST
SQW
BC
X1鈥揦2
NC
CE
IN
CE
OUT
V
OUT
V
CC
V
SS
4
3
2
1
28
27
26

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