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Battery internally isolated until
power is applied
General Description
The CMOS bq4017 is a nonvolatile
16,777,216-bit static RAM organized
as 2,097,152 words by 8 bits. The
integral control circuitry and lith-
ium energy source provide reliable
nonvolatility coupled with the un-
limited write cycles of standard
SRAM.
The control circuitry constantly
monitors the single 5V supply for an
out-of-tolerance condition. When V
CC
falls out of tolerance, the SRAM is
unconditionally write-protected to
prevent an inadvertent write opera-
tion.
At this time the integral energy
source is switched on to sustain the
memory until after V
CC
returns valid.
The bq4017 uses extremely low
standby current CMOS SRAMs, cou-
pled with small lithium coin cells to
provide nonvolatility without long
write-cycle times and the write-cycle
limitations associated with EE-
PROM.
The bq4017 has the same interface
as industry-standard SRAMs and
requires no external circuitry.
Pin Connections
NC
A20
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
VCC
A19
NC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
Pin Names
A
0
鈥揂
20
DQ
0
鈥揇Q
7
CE
OE
WE
V
CC
V
SS
NC
Address inputs
Data input/output
Chip enable input
Output enable input
Write enable input
Supply voltage input
Ground
No connect
Block Diagram
36-Pin DIP Module
PN401701.eps
Selection Guide
Part
Number
bq4017MC -70
Maximum
Access
Time (ns)
70
Negative
Supply
Tolerance
-5%
Part
Number
bq4017YMC -70
Maximum
Access
Time (ns)
70
Negative
Supply
Tolerance
-10%
5/95
1