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AZV99NG Datasheet

  • AZV99NG

  • PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...

  • 15頁

  • AZM

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ARIZONA MICROTEK, INC.
AZV99
PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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Green and RoHS Compliant /
Lead (Pb) Free Packages Available
Similar Operation as AZ100LVEL16VT
except with
LVDS Outputs
Operating Range of 3.0V to 5.5V
Minimizes External Components
Selectable Enable Polarity and
Threshold (CMOS/TTL or PECL)
Available in a 2x2 or 3x3mm
MLP Package
S鈥揚arameter (.s2p) and IBIS Model
Files Available on Arizona Microtek
Website
PACKAGE
MLP 8 (2x2x0.75)
Green / RoHS
Compliant / Lead (Pb)
Free
MLP 8 (2x2x0.75)
MLP 8 (2x2x0.75)
Green / RoHS
Compliant / Lead (Pb)
Free
MLP 8 (2x2x0.75)
Green / RoHS
Compliant / Lead (Pb)
Free
MLP 16 (3x3) Green /
RoHS Compliant /
Lead (Pb) Free
TSSOP 8 RoHS
Compliant / Lead (Pb)
Free
DIE
1
2
3
4
PACKAGE AVAILABILITY
PART NUMBER
AZV99NG
AZV99NA
AZV99NBG
MARKING
V1G
<Date Code>
V9
<Date Code>
V8G
<Date Code>
V2G
<Date Code>
AZMG
V99
<Date Code>
AZ+
V99
N/A
NOTES
1,2
1,2
1,2
AZV99NDG
1,2
AZV99LG
AZV99T+
AZV99XP
1,2
1,2,3
4
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape &
Reel.
Date code format: 鈥淵鈥?for year followed by 鈥淲W鈥?for week.
Date Code 鈥淵WW鈥?on underside of part.
Waffle Pack
DESCRIPTION
The AZV99 is a specialized oscillator gain stage with LVDS output buffer including an enable. The enable
input (EN) allows continuous oscillator operation by only controlling the Q
HG
/Q
HG
outputs.
爐
爐
The AZV99 also provides a V
BB
and 470惟 internal bias resistors from D to V
BB
and D to V
BB
. The V
BB
pin can
support 1.5 mA sink/source current. Bypassing V
BB
to ground with a 0.01
渭F
capacitor is recommended.
MLP 16, 3x3 mm Package (L) or DIE (X)
The MLP 16 and die versions of the AZV99 provide a selectable enable (EN). Enable polarity and threshold can
be selected to accommodate either CMOS/TTL or PECL input levels. See the enable truth table for enable function.
If enable pull-up is desired in the CMOS/TTL mode, an external
鈮?0k惟
resistor connecting EN to V
CC
will override
the on-chip pull-down resistor.
Outputs Q/Q each have a selectable on-chip pull-down current source. See the current source truth table for
爐
current source functions. External resistors may also be used to increase pull-down current to a maximum of 25mA
(includes internal on-chip current source).
1630 S. STAPLEY DR., SUITE 127
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MESA, ARIZONA 85204
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USA
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(480) 962-5881
鈥?/div>
FAX (480) 890-2541
www.azmicrotek.com

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  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM [Arizo...
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    Arizona Microte...
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    Arizona Microte...
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    Arizona Microte...
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    Arizona Microte...
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    Arizona Microte...
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    AZM
  • 英文版
    PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Ena...
    Arizona Microte...

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