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ATV750-20NM/883 Datasheet

  • ATV750-20NM/883

  • High Density UV Erasable Programmable Logic Device

  • 14頁(yè)

  • ATMEL   ATMEL

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Features
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Third Generation Programmable Logic Structure
鈥?High-Density Replacement for Discrete Logic
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High-Speed 鈥?Plus a New, Low-Power Version
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Increased Logic Flexibility
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鈥?42 Inputs and 20 Sum Terms
Flexible Output Logic
鈥?20 Flip-Flops - 10 Extra
鈥?All Can Be Individually Buried or 10 Output Directly
鈥?Each has Individual Asynchronous Reset and Clock Terms
Multiple Feedback Paths Provide for Buried State Machines
and I/O Bus Compatibility
Proven and Reliable High-Speed CMOS EPROM Process
鈥?2000V ESD Protection
鈥?200 mA Latchup Immunity
Reprogrammable
鈥?Tested 100% for Programmability
24-pin, 300-mil Dual-In-line and 28-Lead Surface Mount Packages
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High Density UV
Erasable
Programmable
Logic Device
ATV750
ATV750L
Logic Diagram
Description
The ATV750(L) is 100% more powerful than most other programmable logic devices
in 24-pin packages. Increased product terms, sum terms, and flip-flops translate into
more usable gates.
Each of the ATV750(L)鈥檚 twenty-two logic pins can be used as an input. Ten of these
can be used as input, output, or bi-directional I/O pins. All twenty flip-flops can be fed
back into the array independently. This flexibility allows burying all of the sum terms
and flip-flops.
There are 171 product terms available. A variable format is used to assign between
four and eight product terms per sum term. There are two sum terms per output, pro-
viding added flexibility.
(continued)
Pin Configurations
Pin Name
IN
I/O
*
VCC
Function
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5V Supply
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
DIP/SOIC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
PLCC/LCC
(Top View)
IN
IN
IN
*
VCC
I/O
I/O
4
3
2
1
28
27
26
IN
IN
IN
*
IN
IN
IN
5
6
7
8
9
10
11
25
24
23
22
21
20
19
I/O
I/O
I/O
*
I/O
I/O
I/O
IN
IN
GND
*
IN
I/O
I/O
12
13
14
15
16
17
18
Rev. 0024E鈥?5/98
1

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