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ATF20V8C-15PC Datasheet

  • ATF20V8C-15PC

  • 30頁

  • ETC

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Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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Next Generation Equivalent of ATF20V8B (ATF20V8BQ, ATF22V10BQC)
Complimentary Easy-to-use Atmel-WinCUPL Design Software
鈥淶鈥?Zero Power Compared to 鈥淟鈥?Low Power
Edge-sensing Zero Standby Power (10 碌A(chǔ) Typical) (CQZ)
Pin-controlled Zero Standby Power (10 碌A(chǔ) Typical) Option (C, CQ)
User-controlled Power-down Pin (C, CQ)
High-speed Electrically Erasable Programmable Logic Devices
鈥?5 ns Maximum Pin-to-pin Delay (C)
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CMOS and TTL Compatible Inputs and Outputs
鈥?Pin-keeper Feature Holds Inputs and I/Os to Previous Logic States
鈥?PCI Compliant
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High-reliability EE Process
鈥?20 Year Data Retention
鈥?100 Erase/Write Cycles
鈥?2,000V ESD Protection
鈥?200 mA Latch-up Immunity
鈥?/div>
Commercial and Industrial Temperature Ranges
AT20V8C Family
High-
performance
EE PLD
ATF20V8C
ATF20V8CQ
ATF20V8CQZ
Pin Configurations
All Pinouts Top View
Pin Name
CLK
IN
I/O
OE
NC
VCC
PD
Function
Clock
Logic Inputs
Bi-directional Buffers
Output Enable
No Internal Connection
+5V Supply
Power-down
PLCC
IN
IN
CLK/IN
NC
VCC
IN
I/O
TSSOP
CLK/IN
IN
IN
(1)
PD/
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OE/IN
DIP/SOIC
CLK/IN
IN
IN
(1)
PD/IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OE/IN
(1)
4
3
2
1
28
27
26
Note:
1. PD on C and CQ only.
Rev. 0408H鈥?4/01
IN
IN
GND
NC
OE/IN
IN
I/O
12
13
14
15
16
17
18
PD/IN
IN
IN
NC
IN
IN
IN
5
6
7
8
9
10
11
25
24
23
22
21
20
19
I/O
I/O
I/O
NC
I/O
I/O
I/O
1

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