鈥?/div>
鈥?Input and I/O Pull-up Resistors
Advanced Flash Technology
鈥?Reprogrammable
鈥?100% Tested
High-reliability CMOS Process
鈥?20 Year Data Retention
鈥?100 Erase/Write Cycles
鈥?2,000V ESD Protection
鈥?200 mA Latchup Immunity
Commercial, and Industrial Temperature Ranges
Dual-in-line and Surface Mount Packages in Standard Pinouts
PCI-compliant
High-
performance
EE PLD
ATF16V8B
ATF16V8BQ
ATF16V8BQL
鈥?/div>
鈥?/div>
鈥?/div>
Block Diagram
TSSOP
Pin Configurations
All Pinouts Top View
Pin Name
CLK
I
I/O
OE
VCC
Function
Clock
Logic Inputs
Bi-directional Buffers
Output Enable
+5V Supply
I/CLK
I1
I2
I3
I4
I5
I6
I7
I8
GND
1
2
3
4
5
6
7
8
9
10
I/CLK
I1
I2
I3
I4
I5
I6
I7
I8
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I9/OE
DIP/SOIC
20
19
18
17
16
15
14
13
12
11
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I9/OE
PLCC
I2
I1
I/CLK
VCC
I/O
3
2
1
20
19
9
10
11
12
13
I3
I4
I5
I6
I7
4
5
6
7
8
18
17
16
15
14
I/O
I/O
I/O
I/O
I/O
Rev. 0364I鈥?4/01
I8
GND
I9/OE
I/O
I/O
1
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