鈥?/div>
High-density, High-performance, Electrically-erasable Complex
Programmable Logic Device
鈥?128 Macrocells
鈥?5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
鈥?84, 100, 160 Pins
鈥?7.5 ns Maximum Pin-to-pin Delay
鈥?Registered Operation up to 125 MHz
鈥?Enhanced Routing Resources
Flexible Logic Macrocell
鈥?D/T/Latch Configured Flip-flops
鈥?Global and Individual Register Control Signals
鈥?Global and Individual Output Enable
鈥?Programmable Output Slew Rate
鈥?Programmable Output Open Collector Option
鈥?Maximum Logic Utilization by Burying a Register within a COM Output
Advanced Power Management Features
鈥?Automatic 10 碌A(chǔ) Standby for 鈥淟鈥?Version
鈥?Pin-controlled 1 mA Standby Mode
鈥?Programmable Pin-keeper Inputs and I/Os
鈥?Reduced-power Feature per Macrocell
Available in Commercial and Industrial Temperature Ranges
Available in 84-lead PLCC and 100-lead PQFP and TQFP and 160-lead PQFP Packages
Advanced EE Technology
鈥?100% Tested
鈥?Completely Reprogrammable
鈥?10,000 Program/Erase Cycles
鈥?20-year Data Retention
鈥?2000V ESD Protection
鈥?200 mA Latch-up Immunity
JTAG Boundary-scan Testing to IEEE Std. 1149.1-1990 and 1149.1a-1993 Supported
Fast In-System Programmability (ISP) via JTAG
PCI-compliant
3.3 or 5.0V I/O Pins
Security Fuse Feature
鈥?/div>
High-
performance
EE PLD
ATF1508AS
ATF1508ASL
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Enhanced Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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鈥?/div>
鈥?/div>
鈥?/div>
Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)
Output Enable Product Terms
Transparent-latch Mode
Combinatorial Output with Registered Feedback within Any Macrocell
Three Global Clock Pins
ITD (Input Transition Detection) Circuits on Global Clocks, Inputs and I/O
Fast Registered Input from Product Term
Programmable 鈥淧in-keeper鈥?Option
V
CC
Power-up Reset Option
Pull-up Option on JTAG Pins TMS and TDI
Advanced Power Management Features
鈥?Edge-controlled Power-down 鈥淟鈥?/div>
鈥?Individual Macrocell Power Option
鈥?Disable ITD on Global Clocks, Inputs and I/O for 鈥淶鈥?Parts
Rev. 0784M鈥?8/01
1
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ATF1508AS-10QI100 產(chǎn)品屬性
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