AT89C51CC03U-SLSIM Datasheet

IC型號：
AT89C51CC03U-SLSIM
PDF描述：
Enhanced 8-bit MCU with CAN Controller and Flash Memory
文件大小：
2619.12KB
PDF頁數(shù)：
195頁
芯片廠家：
ATMEL

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Features

鈥?/div>

80C51 Core Architecture

256 Bytes of On-chip RAM

2048 Bytes of On-chip ERAM

64K Bytes of On-chip Flash Memory

鈥?Data Retention: 10 Years at 85擄C

鈥?Read/Write Cycle: 100K

鈥?/div>

2K Bytes of On-chip Flash for Bootloader

鈥?/div>

2K Bytes of On-chip EEPROM

Read/Write Cycle: 100K

鈥?/div>

Integrated Power Monitor (POR: PFD) To Supervise Internal Power Supply

鈥?/div>

14-sources 4-level Interrupts

鈥?/div>

Three 16-bit Timers/Counters

鈥?/div>

Full Duplex UART Compatible 80C51

鈥?/div>

High-speed Architecture

鈥?In Standard Mode:

40 MHz (Vcc 3V to 5.5V, both Internal and external code execution)

60 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)

鈥?In X2 mode (6 Clocks/machine cycle)

20 MHz (Vcc 3V to 5.5V, both Internal and external code execution)

30 MHz (Vcc 4.5V to 5.5V and Internal Code execution only)

鈥?/div>

Five Ports: 32 + 4 Digital I/O Lines

鈥?/div>

Five-channel 16-bit PCA with

鈥?PWM (8-bit)

鈥?High-speed Output

鈥?Timer and Edge Capture

鈥?/div>

Double Data Pointer

鈥?/div>

21-bit WatchDog Timer (7 Programmable Bits)

鈥?/div>

A 10-bit Resolution Analog to Digital Converter (ADC) with 8 Multiplexed Inputs

鈥?/div>

SPI Interface, (PLCC52, VPFP64 and CABGA 64 packages only)

鈥?/div>

Full CAN Controller

鈥?Fully Compliant with CAN Rev 2.0A and 2.0B

鈥?Optimized Structure for Communication Management (Via SFR)

鈥?15 Independent Message Objects

鈥?Each Message Object Programmable on Transmission or Reception

鈥?Individual Tag and Mask Filters up to 29-bit Identifier/Channel

鈥?8-byte Cyclic Data Register (FIFO)/Message Object

鈥?16-bit Status and Control Register/Message Object

鈥?16-bit Time-Stamping Register/Message Object

鈥?CAN Specification 2.0 Part A or 2.0 Part B Programmable for Each Message

Object

鈥?Access to Message Object Control and Data Registers Via SFR

鈥?Programmable Reception Buffer Length Up To 15 Message Objects

鈥?Priority Management of Reception of Hits on Several Message Objects at the

Same Time (Basic CAN Feature)

鈥?Priority Management for Transmission

鈥?Message Object Overrun Interrupt

鈥?Supports

鈥?Time Triggered Communication

鈥?Autobaud and Listening Mode

鈥?Programmable Automatic Reply Mode

鈥?1-Mbit/s Maximum Transfer Rate at 8 MHz

(1)

Crystal Frequency in X2 Mode

鈥?Readable Error Counters

鈥?Programmable Link to On-chip Timer for Time Stamping and Network

Synchronization

鈥?Independent Baud Rate Prescaler

鈥?Data, Remote, Error and Overload Frame Handling

At BRP = 1 sampling point will be fixed.

Enhanced 8-bit

MCU with CAN

Controller and

Flash Memory

AT89C51CC03

Rev. 4182I鈥揅AN鈥?6/05

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