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AT84AD004VTD Datasheet

  • AT84AD004VTD

  • DUAL 8 BIT 500 MSPS ADC

  • 58頁

  • ATMEL   ATMEL

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Features
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Dual ADC with 8-bit Resolution
500 Msps Sampling Rate per Channel, 1 Gsps in Interlaced Mode
Single or 1:2 Demultiplexed Output
LVDS Output Format (100鈩?
500 mVpp Analog Input (Differential Only)
Differential or Single-ended 50鈩?PECL/LVDS Compatible Clock Inputs
Power Supply: 3.3V (Analog), 3.3V (Digital), 2.25V (Output)
LQFP144 Package
Temperature Range:
鈥?0擄C < T
A
< 70擄C (Commercial Grade)
鈥?-40擄C < T
A
< 85擄C (Industrial Grade)
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3-wire Serial Interface
鈥?16-bit Data, 3-bit Address
鈥?1:2 or 1:1 Output Demultiplexer Ratio Selection
鈥?Full or Partial Standby Mode
鈥?Analog Gain (鹵1.5 dB) Digital Control
鈥?Input Clock Selection
鈥?Analog Input Switch Selection
鈥?Binary or Gray Logical Outputs
鈥?Synchronous Data Ready Reset
鈥?Data Ready Delay Adjustable on Both Channels
鈥?Interlacing Functions:
Offset and Gain (Channel to Channel) Calibration
Digital Fine SDA (Fine Sampling Delay Adjust) on One Channel
鈥?Internal Static or Dynamic Built-In Test (BIT)
Dual 8-bit
500 Msps ADC
AT84AD004
Smart ADC
Performance
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Low Power Consumption: 0.7W per Channel
Power Consumption in Standby Mode: 120 mW
1 GHz Full Power Input Bandwidth (-3 dB)
SNR = 43 dB Typ (7.0 ENOB), THD = -53 dBc, SFDR = -55 dBc at Fs = 500 Msps
Fin = 250 MHz
2-tone IMD3: -54 dBc (249 MHz, 251 MHz) at 500 Msps
DNL = 0.25 LSB, INL = 0.5 LSB
Channel to Channel Input Offset Error: 0.5 LSB Max (After Calibration)
Gain Matching (Channel to Channel): 0.5 LSB Max (After Calibration)
Low Bit Error Rate (10
-15
) at 500 Msps
Application
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Instrumentation
Satellite Receivers
Direct RF Down Conversion
WLAN
5390A鈥揃DC鈥?6/04
1

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