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8-bit Interface: 20 MHz Maximum Clock Frequency
Page Program Operation
鈥?Dedicated Intelligent Programming Operation
鈥?16,384 Pages (1,056 Bytes/Page) Main Memory
Automated Page and Block Erase Operations
Two 1056-byte SRAM Data Buffers 鈥?Allows Receiving of Data
while Reprogramming the Flash Array
Continuous Read Capability through Entire Array
鈥?Ideal for Code Shadowing Applications
Low-power Dissipation
鈥?10 mA Active Read Current Typical 鈥?Serial Interface
鈥?12 mA Active Read Current Typical 鈥?8-bit Interface
鈥?5 碌A(chǔ) CMOS Standby Current Typical
Hardware Data Protection
Security: 128-byte Security Register
鈥?64-byte User Programmable Space
鈥?Unique 64-byte Device Identifier
100,000 Program/Erase Cycles Per Page Typical
Data Retention 鈥?10 Years
Commercial and Industrial Temperature Ranges
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鈥?/div>
128-megabit
2.7-volt
Dual-interface
DataFlash
廬
AT45DB1282
Preliminary
鈩?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Description
The AT45DB1282 is a 2.7-volt, dual-interface sequential access Flash memory ideally
suited for a wide variety of digital voice-, image-, program code- and data-storage
Pin Configurations
Pin Name
CS
SCK/CLK
SI
SO
I/O7 - I/O0
WP
RESET
RDY/BUSY
SER/BYTE
Function
Chip Select
Serial Clock/Clock
Serial Input
Serial Output
8-bit Input/Output
Hardware Page Write
Protect Pin
Chip Reset
Ready/Busy
Serial/8-bit Interface
Control
TSOP Top View: Type 1
NC
NC
RDY/BUSY
RESET
WP
NC
NC
NC
VCC
GND
NC
NC
NC
NC
CS
SCK
SI*
SO*
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
NC
NC
NC
NC
NC
I/O7*
I/O6*
I/O5*
I/O4*
VCCP*
GNDP*
I/O3*
I/O2*
I/O1*
I/O0*
SER/BYTE*
CLK
NC
NC
NC
CBGA Top View
1
2
3
4
5
A
B
C
NC SER/BYTE NC
I/O7
VCC
I/O6
I/O5
I/O4
D
I/O2 SCK/CLK GND
E
I/O1
CS RDY/BUSY WP
SO
SI
F
I/O0
RESET I/O3
NC
NC
G
NC
GNDP VCCP
H
Note:
*Optional Use 鈥?See pin description text
for connection information.
J
Rev. 2472C鈥揇FLSH鈥?1/03
1
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