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AT40K20LV-2CQC Datasheet

  • AT40K20LV-2CQC

  • Field Programmable Gate Array (FPGA)

  • 54頁

  • ETC

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Features
鈥?/div>
Ultra High Performance
鈥?System Speeds to 100 MHz
鈥?Array Multipliers > 50 MHz
鈥?10ns Flexible SRAM
鈥?Internal 3-State Capability in each Cell
FreeRAM
鈩?/div>
鈥?Flexible, Single/Dual Port, Sync/Async 10 ns SRAM
鈥?2,048 - 18,432 Bits of Distributed SRAM Independent of Logic Cells
84 - 384 PCI Compliant I/Os
鈥?3V/5V Capability
鈥?Programmable Output Drive
鈥?Fast, Flexible Array Access Facilitates Pin-Locking
鈥?Pin Compatible with XC4000, XC5200 FPGAs
8 Global Clocks
鈥?Fast, Low Skew Clock Distribution
鈥?Programmable Rising/Falling Edge Transitions
鈥?Distributed Clock Shut-Down Capability for Low Power Management
鈥?Global Reset/Asynchronous Reset Options
鈥?4 Additional Dedicated PCI Clocks
Cache Logic
廬
Dynamic Full/Partial Reconfigurability In-System
鈥?Unlimited Reprogrammability via Serial or Parallel Modes
鈥?Enables Adaptive Designs
鈥?Enables Fast Vector Multiplier Updates
鈥?QuickChange
鈩?/div>
Tools for Fast, Easy Design Changes
Pin-Compatible Package Options
鈥?Plastic Leaded Chip Carriers (PLCC)
鈥?Thin, Plastic Quad Flat Packs (VQFP, TQFP, PQFP)
鈥?Ball Grid Arrays (BGA)
鈥?Pin Grid Arrays (PGAs)
Industry-Standard Design Tools
鈥?Seamless Integration (Libraries, Interface, Full Back-Annotation) with
Concept, Everest, Exemplar, Mentor, OrCAD, Synario, Synopsys,
Verilog, Veribest, Viewlogic, Synplicity
鈥?Timing Driven Placement & Routing
鈥?Automatic/Interactive Multi-Chip Partitioning
鈥?Fast, Efficient Synthesis
鈥?Over 50 Automatic Component Generators Create 1000鈥檚
of Reusable, Fully Deterministic Logic and RAM Functions
Intellectual Property Cores
鈥?Fir Filters, UARTs, PCI, FFT and other System Level Functions
Easy Migration to Atmel Gate Arrays for High Volume Production
鈥?/div>
鈥?/div>
AT40K FPGAs
with FreeRAM鈩?/div>
AT40K05
AT40K10
AT40K20
AT40K40
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
AT40K
AT40K40
40K - 50K
48 x 48
2,304
2,304
18,432
384
Device
Usable Gates
RowsXColumns
Cells
Registers
RAM Bits
I/O (max)
AT40K05
5K - 10K
16 x 16
256
256
2,048
128
AT40K10
10K - 20K
24 x 24
576
576
4,608
192
AT40K20
20K - 30K
32 x 32
1,024
1,024
8,192
256
Rev. 0896B鈥?1/99
1

AT40K20LV-2CQC相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Analog IC
    ETC
  • 英文版
    PHASE CONTROL THYRISTOR
    POSEICO
  • 英文版
    PHASE CONTROL THYRISTOR
    POSEICO [P...
  • 英文版
    EZYTRIGGER
    ETC [ETC]
  • 英文版
    PHASE CONTROL THYRISTOR
    POSEICO
  • 英文版
    PHASE CONTROL THYRISTOR
    POSEICO [P...
  • 英文版
    5K - 50K Gates Coprocessor FPGA with FreeRAM
    ATMEL
  • 英文版
    5K - 50K Gates Coprocessor FPGA with FreeRAM
    ATMEL [ATM...
  • 英文版
    COVER DUST SQ POLY FOR LB/UB SER
  • 英文版
    COVER DUST RND POLY FOR LB SER
  • 英文版
    COVER DUST RECT POLY LB/UB SER
  • 英文版
    BOOT SWITCH TOGGLE HALF
  • 英文版
    ACCY O-RING SEAL FOR MULT SERIES
  • 英文版
    BOOT SILICON NUT WASHER BLACK
  • 英文版
    PROTECTIVE GUARD KB SERIES RECT
  • 英文版
    COVER DUST RECT POLY FOR KB SER
  • 英文版
    BOOT SWITCH TOGGLE FULL BLK
  • 英文版
    BOOT SPLASHPROOF WHT M/P/S SER
  • 英文版
    BOOT SWITCH TOGGLE FULL RED
  • 英文版
    BOOT SWITCH TOGGLE FULL YEL

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