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Memory
Unique Architecture Allows the Flash Array
To Be Read During the E
2
PROM Write Cycle
4 Megabit 5-volt Flash
Configured as a 512K x 8 Memory Array
120 ns Read Access Time
Sector Program Operation
Single Cycle Reprogram (No Erase Necessary)
2048 Sectors, 256-Bytes Wide
10 ms Sector Rewrite
JEDEC Standard Software Data Protection
256K bit Full Feature E
2
PROM
Configured as a 32K x 8 Memory Array
Byte or Page (16 bytes) Write Capability
Write Cycle Time: 10 ms
JEDEC Standard Software Data Protection
Pinout Similar to 32-Pin 4 Mb Flash
Data Memory Endurance: 10,000 cycles
4 Megabit
5-volt Flash with
256K E
2
PROM
Memory
AT29C432
ConcurrentFlash
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Preliminary
Description
The AT29C432 is a CMOS memory specifically designed for applications requiring
both a high density nonvolatile program memory and a smaller nonvolatile data mem-
ory. The AT29C432 provides this in the form of a 4 megabit Flash array integrated
with a 256K bit full featured E
2
PROM array on the same device. A unique feature of
this device is its concurrent read while writing capability. This provides the host sys-
tem read access to the Flash program memory during the write cycle time of the
E
2
PROM.
The two memory arrays share all I/O lines, Address lines and OE and WE inputs.
Each memory array has its own Chip Enable input: CEF for the Flash array and CEE
for the E
2
PROM array.
Additionally, Software Data Protection has been independently implemented for both
arrays and is always enabled. The AT29C432 has a pinout similar to the AT29C040A
Flash memory. A system designer using a Flash memory for program storage and
another smaller, non volatile memory for data storage can easily replace both memo-
ries with the AT29C432.
Pin Configurations
Pin Name
A0 - A18
OE
WE
Function
Addresses
Output Enable
Write Enable
Chip Enable E
2
PROM
Chip Enable Flash
No Connect
TSOP
Type 1
I/O0 - I/O7 Data Inputs/Outputs
CEE
CEF
NC
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