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Fast Read Access Time - 200 ns
Automatic Page Write Operation
Internal Address and Data Latches for 64-Bytes
Internal Control Timer
Fast Write Cycle Times
Page Write Cycle Time: 10 ms Maximum
1 to 64-Byte Page Write Operation
Low Power Dissipation
15 mA Active Current
20
碌A
CMOS Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
Endurance: 10,000 Cycles
Data Retention: 10 Years
Single 3.3V
鹵
5% Supply
JEDEC Approved Byte-Wide Pinout
Commercial and Industrial Temperature Ranges
256K (32K x 8)
Low Voltage
CMOS
E
2
PROM
Description
The AT28LV256 is a high-performance Electrically Erasable and Programmable
Read Only Memory. Its 256K of memory is organized as 32,768 words by 8 bits.
Manufactured with Atmel鈥檚 advanced nonvolatile CMOS technology, the device offers
access times to 200 ns with power dissipation of just 54 mW. When the device is
deselected, the CMOS standby current is less than 200
碌A.
The AT28LV256 is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64-bytes simultaneously. During a write cycle, the addresses and 1 to
(continued)
Pin Configurations
Pin Name
A0 - A14
CE
OE
WE
I/O0 - I/O7
NC
DC
Function
Addresses
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
Don鈥檛 Connect
PDIP, SOIC
Top View
AT28LV256
PLCC
Top View
TSOP
Top View
Note: PLCC package pins 1 and
17 are DON鈥橳 CONNECT.
0273E
2-145