鈥?/div>
鈥?Internal Address and Data Latches for 64 Bytes
鈥?Internal Control Timer
Fast Write Cycle Times
鈥?Page Write Cycle Time: 3 ms or 10 ms Maximum
鈥?1 to 64-byte Page Write Operation
Low Power Dissipation
鈥?80 mA Active Current
鈥?3 mA Standby Current
Hardware and Software Data Protection
DATA Polling for End of Write Detection
High Reliability CMOS Technology
鈥?Endurance: 10
4
or 10
5
Cycles
鈥?Data Retention: 10 Years
Single 5V
鹵
10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Full Military, Commercial, and Industrial Temperature Ranges
256 (32K x 8)
High-speed
Parallel
EEPROM
AT28HC256
Description
The AT28HC256 is a high-performance electrically erasable and programmable read
only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-
tured with Atmel鈥檚 advanced nonvolatile CMOS technology, the AT28HC256 offers
(continued)
Pin Configurations
Pin Name
A0 - A14
CE
OE
WE
I/O0 - I/O7
NC
DC
Function
Addresses
Chip Enable
TSOP
Top View
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
Output Enable
Write Enable
Data Inputs/Outputs
No Connect
Don鈥檛 Connect
LCC, PLCC
Top View
A7
A12
A14
DC
VCC
WE
A13
CERDIP, PDIP, FLATPACK
Top View
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
PGA
Top View
I/O1
I/O2
GND
DC
I/O3
I/O4
I/O5
14
15
16
17
18
19
20
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
A8
A9
A11
NC
OE
A10
CE
I/O7
I/O6
Rev. 0007I鈥?2/99
Note: PLCC package pins 1 and
17 are DON鈥橳 CONNECT.
1