鈥?/div>
鈥?Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V
鹵
10% Supply Range
Compatible with JEDEC Standard AT27C040
Low Power CMOS Operation
鈥?20 碌A(chǔ) max. (less than 1 碌A(chǔ) typical) Standby for V
CC
= 3.6V
鈥?36 mW max. Active at 5 MHz for V
CC
= 3.6V
JEDEC Standard Packages
鈥?32-Lead PLCC
鈥?32-Lead TSOP (8 x 20 mm)
鈥?32-Lead VSOP (8 x 14 mm)
High Reliability CMOS Technology
鈥?2,000V ESD Protection
鈥?200 mA Latchup Immunity
Rapid鈩?Programming Algorithm - 100 碌s/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
鈥?JEDEC Standard for LVTTL and LVBO
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Description
The AT27BV040 chip is a high performance, low power, low voltage, 4,194,304-bit
one-time programmable read only memory (EPROM) organized as 512K by 8 bits. It
requires only one supply in the range of 2.7 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
(continued)
4-Megabit
(512K x 8)
Unregulated
Battery-Voltage
鈩?/div>
High-Speed OTP
EPROM
AT27BV040
Pin Configurations
Pin Name
A0 - A18
O0 - O7
CE
OE
Function
Addresses
Outputs
Chip Enable
Output Enable
PLCC Top View
A12
A15
A16
VPP
VCC
A18
A17
TSOP, VSOP Top View
Type 1
A14
A13
A8
A9
A11
OE
A10
CE
O7
A11
A9
A8
A13
A14
A17
A18
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
A3
O1
O2
GND
O3
O4
O5
O6
14
15
16
17
18
19
20
A7
A6
A5
A4
A3
A2
A1
A0
O0
5
6
7
8
9
10
11
12
13
4
3
2
1
32
31
30
29
28
27
26
25
24
23
22
21
Rev. 0346D鈥?0/98
1
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AT27BV040-12VC 產(chǎn)品屬性
AT27BV040-12VC相關(guān)型號PDF文件下載
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