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AT25F512N-10SI-2.7 Datasheet

  • AT25F512N-10SI-2.7

  • SPI Serial Memory

  • 17頁

  • ATMEL   ATMEL

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Features
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Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
20 MHz Clock Rate
Byte Mode and 256-byte Page Mode for Program Operations
Sector Architecture:
鈥?Two Sectors with 32K Bytes Each (512K)
鈥?Four Sectors with 32K Bytes Each (1M)
鈥?128 Pages per Sector
Product Identification Mode
Low-voltage Operation
鈥?2.7 (V
CC
= 2.7V to 3.6V)
Sector Write Protection
Write Protect (WP) Pin and Write Disable Instructions for
both Hardware and Software Data Protection
Self-timed Program Cycle (60 碌s/Byte Typical)
Self-timed Sector Erase Cycle (1 second/Sector Typical)
Single Cycle Reprogramming (Erase and Program) for Status Register
High Reliability
鈥?Endurance: 10,000 Write Cycles Typical
8-lead JEDEC SOIC
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SPI Serial
Memory
512K (65,536 x 8)
1M (131,072 x 8)
Description
The AT25F512/1024 provides 524,288/1,048,576 bits of serial reprogrammable Flash
memory organized as 65,536/131,072 words of 8 bits each. The device is optimized
for use in many industrial and commercial applications where low-power and low-volt-
age operation are essential. The AT25F512/1024 is available in a space-saving 8-lead
JEDEC SOIC package.
The AT25F512/1024 is enabled through the Chip Select pin (CS) and accessed via a
3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and
Serial Clock (SCK). All write cycles are completely self-timed.
BLOCK WRITE protection for top 1/4, top 1/2 or the entire memory array (1M) or
entire memory array (512K) is enabled by programming the status register. Separate
write enable and write disable instructions are provided for additional data protection.
Hardware data protection is provided via the WP pin to protect against inadvertent
write attempts to the status register. The HOLD pin may be used to suspend any serial
communication without resetting the serial sequence.
AT25F512
AT25F1024
Pin Configurations
Pin Name
CS
SCK
SI
SO
GND
VCC
WP
HOLD
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
CS
SO
WP
GND
8-lead SOIC
1
2
3
4
8
7
6
5
VCC
HOLD
SCK
SI
Rev. 1440M鈥揝EEPR鈥?/03
1

AT25F512N-10SI-2.7 產(chǎn)品屬性

  • 0現(xiàn)貨

  • 停產(chǎn)

  • -

  • 管件

  • 停產(chǎn)

  • 非易失

  • 閃存

  • 閃存

  • 512Kb

  • 64K x 8

  • SPI

  • 20 MHz

  • 100μs

  • -

  • 2.7V ~ 3.6V

  • -40°C ~ 85°C（TC）

  • 表面貼裝型

  • 8-SOIC（0.154"，3.90mm 寬）

  • 8-SOIC

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