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Description
The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8
bits each. The device鈥檚 cascadable feature allows up to 4 devices to share a common
2-wire bus. The device is optimized for use in many industrial and commercial applica-
tions where low power and low voltage operation are essential. The devices are
available in space-saving 8-pin JEDEC PDIP, 8-pin EIAJ, 8-pin JEDEC SOIC, 14-pin
TSSOP, 8-pin LAP, and 8-ball dBGA packages. In addition, the entire family is avail-
able in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to
3.6V) versions.
AT24C128
AT24C256
Pin Configurations
Pin Name
Function
8-pin PDIP
A0
A1
NC
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
NC
GND
8-pin SOIC
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0 - A1
SDA
SCL
WP
NC
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
8-pin Leadless Array
VCC
WP
SCL
SDA
8
7
6
5
1
2
3
4
A0
A1
NC
GND
8-ball dBGA
VCC
WP
SCL
SDA
8
7
6
5
1
2
3
4
A0
A1
NC
GND
Bottom View
14-pin TSSOP
A0
A1
NC
NC
NC
NC
GND
1
2
3
4
5
6
7
Bottom View
14
13
12
11
10
9
8
VCC
WP
NC
NC
NC
SCL
SDA
Rev. 0670E鈥?7/01
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