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AT22LV10L-25JC Datasheet

  • AT22LV10L-25JC

  • Low-Voltage UV Erasable Programmable Logic Device

  • 11頁

  • ATMEL   ATMEL

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Features
鈥?/div>
Low Voltage Programmable Logic Device
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?Wide Power Supply Range - 3.0V to 5.5V
鈥?Ideal for Battery Powered Systems
High Speed Operation
鈥?20 ns max Propagation Delay at V
CC
= 3.0V
Commercial and Industrial Temperature Ranges
Familiar 22V10 Logic Architecture
Low Power 3-Volt CMOS Operation
AT22LV10L
Temp
I
CC
(mA)
Com./Ind.
4/5
AT22LV10
Com./Ind.
35 / 45
V
CC
= 3.6V
鈥?/div>
CMOS and TTL Compatible Inputs and Outputs
鈥?10
碌A(chǔ)
Leakage Maximum
鈥?/div>
Reprogrammable - Tested 100% for Programmability
鈥?/div>
High Reliability CMOS Technology
鈥?2000V ESD Protection
鈥?200 mA Latchup Immunity
鈥?/div>
Dual-In-Line and Surface Mount Packages
Low-Voltage UV
Erasable
Programmable
Logic Device
AT22LV10
AT22LV10L
Logic Diagram
Description
The AT22LV10 and AT22LV10L are low voltage compatible CMOS high performance
Programmable Logic Devices (PLDs). Speeds down to 20 ns and power dissipation
as low as 14.4 mW are offered. All speed ranges are specified over the 3.0V to 5.5V
range. All pins offer a low
鹵10 碌A(chǔ)
leakage.
(continued)
Pin Configurations
Pin Name
CLK/IN
IN
I/O
*
VCC
Function
Clock and Logic Input
Logic Inputs
Bidirectional Buffers
No Internal Connection
3.0V to 5.5V Supply
DIP/SOIC
PLCC
Rev. 0190C鈥?5/98
1

AT22LV10L-25JC 產(chǎn)品屬性

  • 38

  • 集成電路 (IC)

  • 嵌入式 - PLD（可編程邏輯器件）

  • 22V10

  • EPLD

  • 10

  • 3V

  • 25ns

  • 表面貼裝

  • 28-LCC（J 形引線）

  • 28-PLCC（11.51x11.51）

  • 管件

  • AT22LV10L25JC

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