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Available in 16 pin SOIC and TSSOP packages.
3.3V operation.
Advanced 0.35碌 CMOS technology.
Industrial temperature available.
The ASM5P2308A-2 allows the user to obtain 2X and 1X
frequencies on each output bank. The exact configuration
Functional Description
ASM5P2308A is a versatile, 3.3V zero-delay buffer
designed to distribute high-speed clocks. It is available in a
16 pin package. The part has an on-chip PLL which locks
to an input clock presented on the REF pin. The PLL
feedback is required to be driven to FBK pin, and can be
obtained from one of the outputs. The input-to-output
propagation delay is guaranteed to be less than 250pS,
and the output-to-output skew is guaranteed to be less than
200pS.
and output frequencies depends on which output drives the
feedback pin. The ASM5P2308A-3 allows the user to
obtain 4X and 2X frequencies on the outputs.
The ASM5P2308A-4 enables the user to obtain 2X clocks
on all outputs.
The ASM5P2308A-5H is a high-drive version with REF/2
on both banks. Thus, the part is extremely versatile, and
can be used in a variety of applications.
The ASM5P2308A has two banks of four outputs each,
which can be controlled by the select inputs as shown in
the Select Input Decoding Table. The select input also
Alliance Semiconductor
2575 Augustine Drive
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Santa Clara, CA
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Tel: 408.855.4900
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Fax: 408.855.4999
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www.alsc.com
Notice: The information in this document is subject to change without notice.
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