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ASM3P2870AG-06OR Datasheet

  • ASM3P2870AG-06OR

  • Low Power Peak EMI Reducing Solution

  • 12頁

  • ALSC

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September 2005
rev 1.5
Low Power Peak EMI Reducing Solution
Features
Generates an EMI optimized clock signal at the
output.
Integrated loop filter components.
Operates with a 3.3 / 2.5V Supply.
Operating current less than 4mA.
Low power CMOS design.
Input frequency range: 13MHz to 30MHz for 2.5V.
: 13MHz to 30MHz for 3.3V.
Generates a 1X low EMI spread spectrum clock of
the input frequency.
Frequency deviation: 鹵0.75% ( Typ ) @ 22MHz
Input Frequency.
Available in 6-pin TSOT-23, 8-pin SOIC and 8-pin
TSSOP Packages.
ASM3P2870A
The ASM3P2870A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
The ASM3P2870A modulates the output of a single PLL
in order to 鈥渟pread鈥?the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal鈥檚 bandwidth is called 鈥榮pread
spectrum clock generation鈥?
Applications
The ASM3P2870A is targeted towards all portable
devices with very low power requirements like MP3
players and digital still cameras.
Product Description
The ASM3P2870A is a versatile spread spectrum
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2870A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of
all clock
dependent signals. The ASM3P2870A allows significant
system cost savings by reducing the number of circuit
board layers ferrite beads, shielding that are traditionally
required to pass EMI regulations.
Key Specifications
Description
Supply voltages
Cycle-to-Cycle Jitter
Output Duty Cycle
Modulation Rate Equation
Frequency Deviation
Specification
V
DD
= 3.3V / 2.5V
200pS (Max)
45/55%
F
IN
/640
鹵0.75% ( Typ ) @ 22MHz
Block Diagram
V
DD
XIN
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
REFOUT
Modulation
PLL
XOUT
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
V
SS
Alliance Semiconductor
2575 Augustine Drive
鈥?/div>
Santa Clara, CA
鈥?/div>
Tel: 408.855.4900
鈥?/div>
Fax: 408.855.4999
鈥?/div>
www.alsc.com
Notice: The information in this document is subject to change without notice.

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