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ASM3P2508A-08-SR Datasheet

  • ASM3P2508A-08-SR

  • Peak EMI Reducing Solution

  • 3688.55KB

  • 11頁

  • ALSC

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February 2005
rev 1.3
Peak EMI Reducing Solution
Features
Generates an EMI optimized clocking signal at
output.
Input frequency 鈥?14.31818 MHz.
Frequency outputs:
o
o
120 MHz (modulated) - default.
72
MHz
(modulated) or
48
MHz
(modulated) selectable via I2C
鹵 1% Centre spread.
Modulation rate: 40 KHz.
Byte Write via I2C
Supply voltage range 3.3V 鹵 0.3V.
Available in 8-pin SOIC Package.
Available
in
Commercial
and
Industrial
Temperature ranges.
ASM3P2508A
The ASM3P2508A allows significant system cost savings
by reducing the number of circuit board layers and
shielding that are required to pass EMI regulations. The
ASM3P2508A modulates the output of PLL in order to
spread the bandwidth of a synthesized clock, thereby
decreasing the peak amplitudes of its harmonics. This
results in significantly lower system EMI compared to the
typical narrow band signal produced by oscillators and
most clock generators. Lowering EMI by increasing a
signal鈥檚 bandwidth is called spread spectrum clock
generation.
The ASM3P2508A has a feature to power down the
72MHz/48MHz output by writing data into specific
registers in the device via I2C. By writing a 鈥?鈥?into bit 1 of
Byte 0, the PLL block generating 72 MHz / 48MHz can be
powered down. Writing 鈥?鈥?into bit 鈥?鈥?of Byte 1 selects an
output of 72 MHz on FOUT2CLK while a 鈥?鈥?at the same
Product Description
The ASM3P2508A is a versatile spread spectrum
frequency
modulator.
The
ASM3P2508A
reduces
electromagnetic interference (EMI) at the clock source.
location selects a 48 MHz clock output. However, the I2C
block, crystal oscillator, and the PLL block generating
120MHz would be always running.
Block Diagram
V
DD
XIN
XOUT
Crystal
Oscillator
PLL 1
FOUT1CLK
(120 MHz)
SCL
SDA
I2C
Interface
PLL 2
FOUT2CLK
(72 MHz / 48 MHz)
V
SS
Alliance Semiconductor
2575 Augustine Drive
鈥?/div>
Santa Clara CA
鈥?/div>
Tel: 408-855-4900
鈥?/div>
Fax: 408-855-4999
鈥?/div>
www.alsc.com

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