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SRAM

Austin Semiconductor, Inc.

512K x 8 SRAM

Ultra Low Power SRAM

AVAILABLE AS MILITARY

SPECIFICATION

鈥?SMD 5962-95613

鈥?MIL STD-883

1

1,2

AS5C4009LL

PIN ASSIGNMENT

(Top View)

32-Pin DIP, 32-Pin SOJ

& 32-Pin TSOP

FEATURES

鈥?Ultra Low Power with 2V Data Retention

(0.2mW MAX worst case Power-down standby)

鈥?Fully Static, No Clocks

鈥?Single +5V 鹵10% power supply

鈥?Easy memory expansion with CE\ and OE\ options

鈥?All inputs and outputs are TTL-compatible

鈥?Three state outputs

鈥?Operating temperature range:

Ceramic -55

o

C to +125

o

C & -40

o

C to +85

o

C

Plastic

-40

o

C to +85

o

C

3

1. Not applicable to plastic package

2. Applies to CW package only.

3. Contact factory for -55

o

C to +125

o

C

A18

A16

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

Vcc

A15

A17

WE\

A13

A8

A9

A11

OE\

A10

CE\

I/08

I/07

I/06

I/05

I/04

OPTIONS

鈥?Timing

55ns access

70ns access

85ns access

100ns access

鈥?Packages

Ceramic Dip (600 mil)

Ceramic SOJ

5

Plastic TSOP

MARKING

-55

4

-70

-85

-100

CW

ECJ

DG

No. 112

No. 502

No. 1002

I/01

I/02

I/03

Vss

4. For DG package, contact factory

5. Contact Factory

NOTE:

Not all combinations of operating temperature, speed, data retention and low power are

necessarily available. Please contact the factory for availability of specific part number

combinations.

GENERAL DESCRIPTION

The AS5C4009LL is organized as 524,288 x 8 SRAM utilizing a

special ultra low power design process. ASI鈥檚 pinout adheres to the

JEDEC standard for pinout on 4 megabit SRAMs. The evolutionary 32

pin version allows for easy upgrades from the 1 meg SRAM design.

For flexibility in memory applications, ASI offers chip enable (CE\)

and output enable (OE\) capabilities. These features can place the

outputs in High-Z for additional flexibility in system design.

This devices operates from a single +5V power supply and all

inputs and outputs are fully TTL-compatible.

Writing to these devices is accomplished when write enable (WE\)

and CE\ inputs are both LOW. Reading is accomplished when WE\

remains HIGH and CE\ and OE\ go LOW. The device offers a re-

duced power standby mode when disabled, by lowering VCC to 2V and

maintaining CE\ = 2V. This allows system designers to meet ultra low

standby power requirements.

AS5C4009LL

Rev. 4.0 2/01

Pin Name

WE\

CE\

OE\

A0 - A18

I/O1 - I/O8

Vcc

Vss

Function

Write Enable Input

Chip Select Input

Output Enable Input

Address Inputs

Data Inputs/Outputs

Power

Ground

For more products and information

please visit our web site at

www.austinsemiconductor.com

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

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