鈥?/div>
Supports Dallas Chipsets DS 2148/Q48, DS2155/Q55, DS21352/Q352, DS21552/Q552,
DS21354/Q354 and DS21554/Q554 for T1/E1/J1 applications
Minimum board space requirement - ideal for multiple interface line cards
Longitudinal protection circuit designed to meet FCC part 68 as well as Telcordia GR1089 for 1st level and 2nd level
lighting and 1st level power line cross events
Approval for safety standards to BS EN60950 (1500V isolation) pending
APC鈥檚 鈥淪lim Line鈥?T1/E1/J1 hybrids have been designed to minimize the board space requirements for line interface
circuitry on the T1/E1/J1 multichannel line cards
SCHEMATIC
9
VCC
1
3
2
TX
11
12
GND
5
7
6
RX
8
10
13
NOTE: Pin 4 NC
NOTES:
TYPICAL SCHEMATIC (SELV COMPONENTS WILL VARY SUBJECT TO APPLICATION)
MECHANICAL
Side View
8.05 Max
Front View
42.35 Max
Recommended PCB Layout
Recommended
Hole Size 脴1.0
11.80
Max
2.54 PITCH
IN 11 PLACES
10.16
3.3 Max
NOTE: ALL DIMENSIONS IN MM
漏2003 Bel Fuse Inc. Specifications subject to change without notice. 05.20.03
Bel Fuse Inc.
206 Van Vorst Street, Jersey City, NJ 07302 鈥?Tel 201-432-0463 鈥?Fax 201-432-9542 鈥?www.belfuse.com
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