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AD5544EVAL Datasheet

  • AD5544EVAL

  • Quad, Current-Output, Serial-Input 16-/14-Bit DACs

  • 1150.29KB

  • 20頁

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Quad, Current-Output,
Serial-Input 16-/14-Bit DACs
AD5544/AD5554
FEATURES
AD5544 16-bit resolution
AD5554 14-bit resolution
2 mA full-scale current 鹵20%, with V
REF
= 鹵10 V
2 碌s settling time
V
SS
BIAS for zero-scale error reduction @ temp
midscale or zero-scale reset
Four separate, 4-Q multiplying reference inputs
SPI
-compatible 3-wire interface
Double buffered registers enable
Simultaneous multichannel change
Internal power ON reset
Compact SSOP-28 package
FUNCTIONAL BLOCK DIAGRAM
V
REF
A B C D
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A0
A1
V
DD
R
FB
A
INPUT
REGISTER R
DAC A
REGISTER R
DAC A
I
OUT
A
A
GND
A
R
FB
B
16
INPUT
REGISTER R
DAC B
REGISTER R
DAC B
I
OUT
B
A
GND
B
R
FB
C
INPUT
REGISTER R
DAC C
REGISTER R
DAC C
I
OUT
C
A
GND
C
CS
CLK
EN
DAC A
B
C
D
2:4
DECODE
INPUT
REGISTER R
DAC D
REGISTER R
DAC D
R
FB
D
I
OUT
D
A
GND
D
POWER-
ON
RESET
SDO
SDI
APPLICATIONS
Automatic test equipment
Instrumentation
Digitally controlled calibration
AD5544
A
GND
F
00943-0-001
DGND
RS
MSB
LDAC
V
SS
Figure 1.
GENERAL DESCRIPTION
The AD5544/AD5554 quad, 16-/14-bit, current-output, digital
to-analog converters are designed to operate from a single
5 V supply.
The applied external reference input voltage (V
REF
) determines
the full-scale output current. Integrated feedback resistors (R
FB
)
provide temperature-tracking, full-scale voltage outputs when
combined with an external I-to-V precision amplifier.
INL (LSB)
1.0
0.5
0
鈥?.5
鈥?.0
1.0
0.5
0
鈥?.5
鈥?.0
1.0
0.5
0
鈥?.5
鈥?.0
1.0
0.5
0
00943-0-002
DAC A
DAC B
A double-buffered serial-data interface offers high speed,
3-wire, SPI- and microcontroller-compatible inputs using serial-
data-in (SDI), a chip-select (CS), and clock (CLK) signals. In
addition, a serial-data-out pin (SDO) allows for daisy-chaining
when multiple packages are used. A common, level-sensitive,
load-DAC strobe (LDAC) input allows the simultaneous update
of all DAC outputs from previously loaded input registers.
Additionally, an internal power ON reset forces the output
voltage to zero at system turn ON. An MSB pin allows system
reset assertion (RS) to force all registers to zero code when
MSB = 0, or to half-scale code when MSB = 1.
The AD5544/AD5554 are packaged in the compact SSOP-28.
DAC C
DAC D
鈥?.5
鈥?.0
0
8192
16384 24576 32768 40960 49152 57344 65536
CODE (Decimal)
Figure 2. AD5544 INL vs. Code Plot (T
A
= 25擄C)
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703
漏 2004 Analog Devices, Inc. All rights reserved.

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