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AD5326BRU Datasheet

  • AD5326BRU

  • 12-Bit Digital-to-Analog Converter

  • 20頁(yè)

  • ETC

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a
2.5 V to 5.5 V, 400 A, 2-Wire Interface,
Quad Voltage Output, 8-/10-/12-Bit DACs
AD5306/AD5316/AD5326*
GENERAL DESCRIPTION
FEATURES
AD5306: Four Buffered 8-Bit DACs in 16-Lead TSSOP
AD5316: Four Buffered 10-Bit DACs in 16-Lead TSSOP
AD5326: Four Buffered 12-Bit DACs in 16-Lead TSSOP
Low Power Operation: 400 A @ 3 V, 500 A @ 5 V
2-Wire (I
2
C
廬
-Compatible) Serial Interface
2.5 V to 5.5 V Power Supply
Guaranteed Monotonic By Design over All Codes
Power-Down to 90 nA @ 3 V, 300 nA @ 5 V (PD Pin or Bit)
Double-Buffered Input Logic
Buffered/Unbuffered Reference Input Options
Output Range: 0鈥揤
REF
or 0鈥? V
REF
Power-On-Reset to Zero Volts
Simultaneous Update of Outputs (LDAC Pin)
Software Clear Facility
Data Readback Facility
On-Chip Rail-to-Rail Output Buffer Ampli鏗乪rs
Temperature Range 鈥?0 C to +105 C
APPLICATIONS
Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
Industrial Process Control
The AD5306/AD5316/AD5326 are quad 8-, 10-, and 12-bit
buffered voltage output DACs, in a 16-lead TSSOP package, that
operate from a single 2.5 V to 5.5 V supply, consuming 500
碌A(chǔ)
at 3 V. Their on-chip output amplifiers allow rail-to-rail output
swing with a slew rate of 0.7 V/碌s. A 2-wire serial interface that
operates at clock rates up to 400 kHz is used. This interface is
SMBus-compatible at V
DD
< 3.6 V. Multiple devices can be placed
on the same bus.
Each DAC has a separate reference input that can be config-
ured as buffered or unbuffered. The outputs of all DACs may
be updated simultaneously using the asynchronous
LDAC
input.
The parts incorporate a power-on-reset circuit that ensures that
the DAC outputs power-up to zero volts and remain there until
a valid write to the device takes place. There is also a software clear
function that clears all DACs to 0 V. The parts contain a power-
down feature that reduces the current consumption of the device
to 300 nA @ 5 V (90 nA @ 3 V).
All three parts are offered in the same pinout, which allows users
to select the amount of resolution appropriate for their applica-
tion without redesigning their circuit board.
FUNCTIONAL BLOCK DIAGRAM
V
DD
V
REF
A V
REF
B
GAIN-SELECT
LOGIC
DAC
REGISTER
STRING
DAC A
AD5306/AD5316/AD5326
LDAC
INPUT
REGISTER
BUFFER
V
OUT
A
SCL
SDA
A1
A0
LDAC
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
V
OUT
B
INPUT
REGISTER
DAC
REGISTER
STRING
DAC C
BUFFER
V
OUT
C
INPUT
REGISTER
POWER-ON
RESET
DAC
REGISTER
STRING
DAC D
BUFFER
POWER-DOWN
LOGIC
V
OUT
D
V
REF
D V
REF
C
PD
GND
*Protected
by U.S. Patent Numbers 5,969,657 and 5,684,481.
I
2
C is a registered trademark of Philips Corporation.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
漏 Analog Devices, Inc., 2001

AD5326BRU 產(chǎn)品屬性

  • Data Converter FundamentalsDAC Architectures

  • 1

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器

  • -

  • 8µs

  • 12

  • I²C，串行

  • 4

  • 單電源

  • 4.5mW

  • -40°C ~ 105°C

  • 表面貼裝

  • 16-TSSOP（0.173"，4.40mm 寬）

  • 16-TSSOP

  • 管件

  • 4 電壓，單極；4 電壓，雙極

  • 125k

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