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AD5024 Datasheet

  • AD5024

  • Fully Accurate, 12-/14-/16-Bit VOUT nanoDAC, Quad, SPI Inter...

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Fully Accurate, 12-/14-/16-Bit V
OUT
nanoDAC,
Quad, SPI Interface, 4.5 V to 5.5 V in TSSOP
AD5024/AD5044/AD5064
FEATURES
Low power quad 12-/14-/16-bit DAC, 鹵1 LSB INL
Individual and common voltage reference pin options
Rail-to-rail operation
4.5 V to 5.5 V power supply
Power-on reset to zero-scale or midscale
3 power-down functions
Per-channel power-down
Low glitch on power-up
Hardware LDAC with LDAC override function
CLR function to programmable code
16-lead TSSOP
Internal reference buffer and internal output amplifier
GENERAL DESCRIPTION
The AD5024/AD5044/AD5064 are low power, quad 12-/14-/
16-bit buffered voltage output
nanoDAC廬
DACs that offer relative
accuracy specifications of 1 LSB INL with individual reference
pins and can operate from a single 4.5 V to 5.5 V supply. The
AD5024/AD5044/AD5064 parts also offer a differential accuracy
specification of 鹵1 LSB. The parts use a versatile 3-wire, low
power Schmitt trigger serial interface that operates at clock rates
up to 50 MHz and is compatible with standard SPI, QSPI鈩?
MICROWIRE鈩? and DSP interface standards. A reference buffer
is also provided on-chip. The AD5024/AD5044/AD5064 incor-
porate a power-on reset circuit that ensures the DAC output
powers up to zero scale or midscale and remains there until a
valid write takes place to the device. The AD5024/AD5044/
AD5064 contain a power-down feature that reduces the current
consumption of the device to typically 400 nA at 5 V and provides
software selectable output loads while in power-down mode.
Total unadjusted error for the parts is <2 mV.
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
Quad channel available in 16-lead TSSOP package.
16-bit accurate, 1 LSB INL.
Low glitch on power-up.
High speed serial interface with clock speeds up to 50 MHz.
Reset to known output voltage (zero scale or midscale).
Table 1. Related Devices
Part No.
AD5666
AD5063/AD5062
AD5061
AD5060/AD5040
Description
Quad,16-bit buffered DAC,16 LSB INL, TSSOP
16-bit
nanoDAC,
1 LSB INL
16-/14-bit
nanoDAC,
4 LSB INL, SOT-23
16-/14-bit
nanoDAC,
1 LSB INL, SOT-23
FUNCTIONAL BLOCK DIAGRAM
V
DD
V
REF
A V
REF
B
AD5024/
AD5044/
AD5064
SCLK
LDAC
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
INPUT
REGISTER
POWER-ON
RESET
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC
REGISTER
DAC A
BUFFER
V
OUT
A
SYNC
INTERFACE
LOGIC
DAC B
BUFFER
V
OUT
B
DAC C
BUFFER
V
OUT
C
DIN
DAC D
BUFFER
V
OUT
D
POWER-DOWN
LOGIC
V
REF
C
V
REF
D
GND
06803-001
LDAC CLR
POR
Figure 1.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
漏2008 Analog Devices, Inc. All rights reserved.

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