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AD1555BPRL Datasheet

  • AD1555BPRL

  • 24-Bit ADC WITH LOW NOISE PGA

  • 24頁

  • AD

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a
FEATURES
AD1555
Fourth Order - Modulator
Large Dynamic Range
116 dB Min, 120 dB Typical @ 1 ms
117 dB Typical @ 0.5 ms
Low Input Noise: 80 nV rms @ 4 ms with
Gain of 34,128
Low Distortion: 鈥?11 dB Max, 鈥?20 dB Typical
Low Intermodulation: 122 dB
Sampling Rate at 256 kSPS
Very High Jitter Tolerance
No External Antialias Filter Required
Programmable Gain Front End
Input Range: 2.25 V
Robust Inputs
Gain Settings: 1, 2.5, 8.5, 34, 128
Common-Mode Rejection (DC to 1 kHz)
93 dB Min, 101 dB Typical @ Gain of 1
77 mW Typical Low Power Dissipation
Standby Modes
AD1556
FIR Digital Filter/Decimator
Serial or Parallel Selection of Configuration
Output Word Rates: 250 SPS to 16 kSPS
6.2 mW Typ Low Power Dissipation
70 W in Standby Mode
Reference Design and Evaluation Board with
Software Available
APPLICATIONS
Seismic Data Acquisition Systems
Chromatography
Automatic Test Equipment
GENERAL DESCRIPTION
24-Bit - ADC
with Low Noise PGA
AD1555/AD1556
high dynamic range measurement applications. The AD1555
outputs a ones-density bitstream proportional to the analog
input. When used in conjunction with the AD1556 digital filter/
decimator, a high performance ADC is realized.
The continuous-time analog modulator input architecture avoids
the need for an external antialias filter. The programmable gain
front end simplifies system design, extends the dynamic range,
and reduces the system board area. Low operating power and
standby modes makes the AD1555 ideal for remote battery-pow-
ered data acquisition systems.
The AD1555 is fabricated on Analog Devices鈥?BiCMOS process
that has high performance bipolar devices along with CMOS
transistors. The AD1555 and AD1556 are packaged, respectively,
in 28-lead PLCC and 44-lead MQFP packages and are specified
from 鈥?5擄C to +85擄C (AD1556 and AD1555 B Grade) and from
0擄C to 85擄C (AD1555 A Grade).
0
鈥?0
鈥?0
AMPLITUDE 鈥?dBr
f
IN
= 24.4Hz
SNR = 116.7dB
THD = 鈥?20.6dB
鈥?0
鈥?0
鈥?00
鈥?20
鈥?40
鈥?60
鈥?80
鈥?00
0
50
100
150
200 250 300 350
FREQUENCY 鈥?Hz
400
450
500
Figure 1. FFT Plot, Full-Scale AIN Input, Gain of 1
The AD1555 is a complete sigma-delta modulator, combined
with a programmable gain amplifier intended for low frequency,
FUNCTIONAL BLOCK DIAGRAM
REFIN
REFCAP2
REFCAP1
AGND3
CB0...CB4
REF DIVIDER
DAC
MODE CONTROL
LOGIC
OVERVOLTAGE
DETECTION
MFLG
PGA
CONTROL
CONFIGURATION
REGISTER
STATUS
REGISTER
INPUT
MUX
DIGITAL
FILTER
DATA
REGISTER
DATA
OUTPUT
MUX
INPUT SHIFT
REGISTER
DIN
SCLK
CS
R/W
DOUT
DRDY
CLOCK DIVIDER
RSEL
PGA0...PGA4
H/S
ERROR
CSEL
PGA
AIN (+)
AIN (鈥?
TIN (+)
TIN (鈥?
AGND1
PGAOUT
MODIN
MUX
LOOP
FILTER
TDATA
MDATA
CLOCK
GENERATION
鈥揤
A
V
L
DGND
AD1555
AGND2
+V
A
MCLK
AD1556
CLKIN SYNC
BW0...BW2 RESET PWRDN GND V
L
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
漏 Analog Devices, Inc., 2002

AD1555BPRL 產(chǎn)品屬性

  • 750

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器

  • -

  • 24

  • 256k

  • 串行，并聯(lián)

  • 1

  • 96mW

  • 雙 ±

  • -55°C ~ 85°C

  • 表面貼裝

  • 28-LCC（J 形引線）

  • 28-PLCC（11.51x11.51）

  • 帶卷 (TR)

  • 1 個差分，雙極

  • AD1555BPRL-ND

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