82596DX AND 82596SX
HIGH-PERFORMANCE 32-BIT LOCAL
AREA NETWORK COPROCESSOR
Y
Performs Complete CSMA CD Medium
Access Control (MAC) Functions
Independently of CPU
IEEE 802 3 (EOC) Frame Delimiting
Supports Industry Standard LANs
IEEE TYPE 10BASE-T (TPE)
IEEE TYPE 10BASE5 (Ethernet )
IEEE TYPE 10BASE2 (Cheapernet)
IEEE TYPE 1BASE5 (StarLAN)
and the Proposed Standard
TYPE 10BASE-F
Proprietary CSMA CD Networks Up
to 20 Mb s
On-Chip Memory Management
Automatic Buffer Chaining
Buffer Reclamation after Receipt of
Bad Frames Optional Save Bad
Frames
32-Bit Segmented or Linear (Flat)
Memory Addressing Formats
82586 Software Compatible
Optimized CPU Interface
82596DX Bus Interface Optimized to
Intel鈥檚 32-Bit i386
TM
DX
82596SX Bus Interface Optimized to
Intel鈥檚 16-Bit i386
TM
SX
Supports Big Endian and Little
Endian Byte Ordering
Y
Y
High-Performance 16- 32-Bit Bus
Master Interface
66-MB s Bus Bandwidth
33-MHz Clock Two Clocks Per
Transfer
Bus Throttle Timers
Transfers Data at 100% of Serial
Bandwidth
128-Byte Receive FIFO 64-Byte
Transmit FIFO
Network Management and Diagnostics
Monitor Mode
32-Bit Statistical Counters
Self-Test Diagnostics
Configurable Initialization Root for Data
Structures
High-Speed 5-V CHMOS
Technology
IV
Y
Y
Y
Y
Y
Y
Y
Y
132-Pin Plastic Quad Flat Pack (PQFP)
and PGA Package
(See Packaging Specifications Order Number 240800-001
Package Type KU and A)
i386
TM
is a trademark of Intel Corporation
Ethernet is a registered trademark of Xerox Corporation
CHMOS is a patented process of Intel Corporation
290219 鈥?
Figure 1 82596DX SX Block Diagram
Other brands and names are the property of their respective owners
Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or
copyright for sale and use of Intel products except as provided in Intel鈥檚 Terms and Conditions of Sale for such products Intel retains the right to make
changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
COPYRIGHT
INTEL CORPORATION 1996
November 1995
Order Number 290219-006