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A3959SB-T Datasheet

  • A3959SB-T

  • DMOS FULL-BRIDGE PWM MOTOR DRIVER

  • 275.30KB

  • 12頁(yè)

  • ALLEGRO   ALLEGRO

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3959
A3959SLB
(SOIC)
CHARGE PUMP
DMOS FULL-BRIDGE PWM
MOTOR DRIVER
Designed for pulse-width modulated (PWM) current control of dc
motors, the A3959SB, A3959SLB, and A3959SLP are capable of
output currents to 鹵3 A and operating voltages to 50 V. Internal fixed
off-time PWM current-control timing circuitry can be adjusted via
control inputs to operate in slow, fast, and mixed current-decay modes.
PHASE and ENABLE input terminals are provided for use in
controlling the speed and direction of a dc motor with externally
applied PWM-control signals. Internal synchronous rectification
control circuitry is provided to reduce power dissipation during PWM
operation.
Internal circuit protection includes thermal shutdown with
hysteresis, undervoltage monitoring of supply and charge pump, and
crossover-current protection. Special power-up sequencing is not
required.
The A3959SB/SLB/SLP is a choice of three power packages, a
24-pin plastic DIP with a copper batwing tab (package suffix 鈥楤鈥?, a
24-lead plastic SOIC with a copper batwing tab (package suffix 鈥楲B鈥?,
and a thin (<1.2 mm) 28-lead plastic TSSOP with an exposed thermal
pad (suffix 鈥楲P鈥?. In all cases, the power tab is at ground potential and
needs no electrical isolation.
Each package is available in a lead-
Data Sheet
29319.37E
CP
CP
2
CP
1
PHASE
ROSC
GROUND
GROUND
LOGIC SUPPLY
ENABLE
PFD
2
BLANK
PFD
1
1
2
3
4
5
胃
24
23
NC
22
21
V
BB
20
19
18
V
REG
SLEEP
NO
CONNECTION
OUT
B
LOAD SUPPLY
GROUND
GROUND
SENSE
OUT
A
NO
CONNECTION
EXT MODE
REF
Dwg. PP-069-4
6
7
8
9
9
V
DD
LOGIC
17
16
PWM TIMER
10
11
12
NC
15
14
梅
10
13
Note that the A3959SLB(SOIC), A3959SB (DIP),
and A3959SLP (TSSOP) do not share a common
terminal assignment.
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, V
BB
.........................
50 V
Output Current, I
OUT
(Repetitive) ...........
鹵3.0 A
(Peak, <3 碌s) ...................................
鹵6.0 A
Logic Supply Voltage, V
DD
.......................
7.0 V
Logic Input Voltage Range, V
IN
(Continuous) ............
-0.3 V to V
DD
+ 0.3 V
(t
w
<30 ns) ...............
-1.0 V to V
DD
+ 1.0 V
Sense Voltage, V
S
(Continuous) ..............
0.5 V
(t
w
<3 碌s) ...........................................
2.5 V
Reference Voltage, V
REF
............................
V
DD
Package Power Dissipation (T
A
= 25擄C), P
D
A3959SB ........................................
3.3 W*
A3959SLB ......................................
2.5 W*
A3959SLP ......................................
3.1 W*
Operating Temp. Range, T
A
....
-20擄C to +85擄C
Junction Temperature, T
J
.....................
+150擄C
Storage Temp. Range, T
S
.....
-55擄C to +150擄C
Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specified
current rating or a junction temperature of 150擄C.
free version (100% matte tin leadframe).
FEATURES
s
s
s
s
s
s
s
鹵3 A, 50 V Output Rating
Low
r
DS(on)
Outputs (270 m鈩? Typical)
Mixed, Fast, and Slow Current-Decay Modes
Synchronous Rectification for Low Power Dissipation
Internal UVLO and Thermal-Shutdown Circuitry
Crossover-Current Protection
Internal Oscillator for Digital PWM Timing
Package
24-pin batwing DIP
24-pin batwing DIP; Lead-free
24-lead batwing SOIC
24-lead batwing SOIC; Lead-free
28-lead thin shrink SOIC
28-lead thin shrink SOIC; Lead-free
R
胃
JA
*
38擄C/W
38擄C/W
50擄C/W
50擄C/W
40擄C/W
40擄C/W
R
胃
JT
6擄C/W
6擄C/W
6擄C/W
6擄C/W
鈥?/div>
鈥?/div>
Always order by complete part number:
Part Number
A3959SB
A3959SB-T
A3959SLB
A3959SLB-T
A3959SLP
A3959SLP-T
* Double-sided board, one square inch copper each side. See also, Layout, page 7.

A3959SB-T 產(chǎn)品屬性

  • 15

  • 集成電路 (IC)

  • PMIC - 電機(jī)和風(fēng)扇控制器，驅(qū)動(dòng)器

  • -

  • PWM 電機(jī)驅(qū)動(dòng)器

  • -

  • 1

  • ±3A

  • 9.5 V ~ 50 V

  • 4.5 V ~ 5.5 V

  • -20°C ~ 85°C

  • 通孔

  • 24-DIP（0.300"，7.62mm）

  • 24-DIP

  • 管件

  • 620-1069

A3959SB-T相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
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    Industrial Control IC
    ETC

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