M
Features
鈥?Single supply with programming operation down
to 2.5V
鈥?Low power CMOS technology
鈥?100 碌A(chǔ) typical active READ current at 2.5V
鈥?3 碌A(chǔ) typical standby current at 2.5V
鈥?ORG pin selectable memory configuration
鈥?128 x 8- or 64 x 16-bit organization (93LC46)
鈥?256 x 8- or 128 x 16-bit organization (93LC56)
鈥?512 x 8 or 256 x 16 bit organization (93LC66)
鈥?Self-timed ERASE and WRITE cycles
(including auto-erase)
鈥?Automatic ERAL before WRAL
鈥?Power on/off data protection circuitry
鈥?Industry standard 3-wire serial I/O
鈥?Device status signal during ERASE/WRITE
cycles
鈥?Sequential READ function
鈥?1,000,000 E/W cycles guaranteed
鈥?Data retention > 200 years
鈥?8-pin PDIP/SOIC
(SOIC in JEDEC standards)
鈥?Temperature ranges supported:
- Industrial (I):
-40擄C to +85擄C
93LC46/56/66
Description
The Microchip Technology Inc. 93LC46/56/66 are 1K,
2K and 4K low voltage serial Electrically Erasable
PROMs (EEPROM). The device memory is configured
as x8 or x16 bits depending on the external logic of lev-
els of the ORG pin. Advanced CMOS technology
makes these devices ideal for low power non-volatile
memory applications. The 93LC Series is available in
standard 8-pin PDIP and surface mount SOIC pack-
ages. The rotated pin-out 93LC46X/56X/66X are
offered in the 鈥淪N鈥?package only.
1K/2K/4K 2.5V Microwire
廬
Serial EEPROM
Package Types
PDIP/SOIC
CS
CLK
DI
DO
ROTATED SOIC
NU
V
CC
CS
CLK
1
2
3
4
8
7
6
5
ORG
V
SS
DO
DI
93LC46X
93LC56X
93LC66X
1
2
3
4
8
7
6
5
V
CC
NU
ORG
V
SS
93LC46
93LC56
93LC66
Block Diagram
V
CC
V
SS
ADDRESS
DECODER
MEMORY
ARRAY
ADDRESS
COUNTER
OUTPUT
BUFFER
DO
DATA REGISTER
DI
ORG
CS
MODE
DECODE
LOGIC
CLK
CLOCK
REGISTER
錚?/div>
2002 Microchip Technology Inc.
DS21712A-page 1
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