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93L28 Datasheet

  • 93L28

  • Dual 8-Bit Shift Register

  • 6頁(yè)

  • NSC

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93L28 Dual 8-Bit Shift Register
June 1989
93L28
Dual 8-Bit Shift Register
General Description
The 93L28 is a high speed serial storage element providing
16 bits of storage in the form of two 8-bit registers The
multifunctional capability of this device is provided by sever-
al features 1) additional gating is provided at the input to
both shift registers so that the input is easily multiplexed
between two sources 2) the clock of each register may be
provided separately or together 3) both the true and com-
plementary outputs are provided from each 8-bit register
and both registers may be master cleared from a common
input
Features
Y
Y
Y
Y
2-input multiplexer provided at data input of each
register
Gated clock input circuitry
Both true and complementary outputs provided from
last bit of each register
Asynchronous master reset common to both registers
Connection Diagram
Dual-In-Line Package
Logic Symbol
TL F 10200 鈥?1
Order Number 93L28DMQB or 93L28FMQB
See NS Package Number J16A or W16A
TL F 10200 鈥?2
V
CC
e
Pin 16
GND
e
Pin 8
Pin
Names
S
D0 D1
CP
Description
Data Select Input
Data Inputs
Clock Pulse Input (Active HIGH)
Common (Pin 9)
Separate (Pins 7 and 10)
Master Reset Input (Active LOW)
Last Stage Output
Complementary Output
MR
Q7
Q7
C
1995 National Semiconductor Corporation
TL F 10200
RRD-B30M105 Printed in U S A

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